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Job Title: DigitalDesign and Verification Engineer Location: Shanghai
Description: In thisposition, the candidate will be working with Marvell Audio Processor and Codecproduct line. The candidate will be responsible for developing blocks/IP, interfacemodules and datapath RTL in audio processors and audio codec products. Thecandidate will be working closely with DSP architecture team, where he/she willbe responsible for taking design specifications to RTL. The candidate will alsobe responsible for developing test environment for the developed block. The candidateshould have excellent RTL design and verification skills. Qualifications: MSEE with 5+years of experience or PhD with solid academic background in the following area: ·Micro-architecture development and Verilog RTL coding ·Strong knowledge of Datapath design ·Strong knowledge of control and FSM design ·Strong knowledge of various test methodologies such as UVM/VVM/OVM.Experience in developing functional coverage, assertions and directed/randomtests ·Strong knowledge of Verilog test bench development ·Strong understanding and experience in serial and parallel interfacedesign ·Solid background in mixed signal and low power design methodologies ·Good understanding of ASICimplementation flow – timing constraints, synthesis (DC), timing closure(PT/PTSI) and formal verification ·Excellent communication and documentation skills
The followingskills are a plus - Knowledge ofMatlab, C, Perl and TCL - Knowledge ofSystem Verilog - Experiencewith ARM architecture - Experiencewith filter design and other signal processing tasks If you are interested in any one of the four positions, please send your resume to the following email address: linluo@marvell.com Subject of your email should be: School_Name_Applied position_Information source
Eg.SJTU_Zhang Peng _Data Analyst_BBS |