nvidia--DFT Engineer内推

hbaifenbai

Pls send your resume to hbaifenbai@126.com
Job Description/Qualifications:
As a Senior DFT engineer at NVIDIA, you'll be responsible for cutting edge DFT involving implementing key DFT logic modules, and verifying them. These include test mode controllers, IO BIST, Memory BIST, JTAG. In addition you will be responsible for MBIST, scan insertion and ATPG and post silicon validation.
Responsibilities:
- Full Chip DFT architecture and planning
- Responsible for DFT implmentation and verification including MBIST/Scan insertion, ATPG and pattern verifications
- Working closely with PD/PR team to close test timing and resolve dft related backend issues
- Responsible for ATE chip bringup and failure analysis
Minimum Requirement:
- BSEE required, MSEE preferred.
- 2+ years of experience in DFT/design field
- Strong logic design and verification background with experience in STA.
- Must possess a strong knowledge of DFT including scan, ATPG, Test Compression, JTAG and BIST.
- Skilled in using of Perl, tcl and C/C++
- Excellent Englisth communication skills
- Self-motivated and good team player