NVIDIA-上海招聘DFT Engineer

tracyw

Hi All,

本人NVIDIA-HR Tracy, 目前NVIDIA在上海招聘DFT Engineer的工程师，职位描述如下，如果觉得合适，欢迎发送简历到 tracyw@nvidia.com  or shawon422@163.com

Position Title: DFT Engineer

Job Description/Qualifications:
As a Senior DFT engineer at NVIDIA, you'll be responsible for cutting edge DFT involving implementing key DFT logic modules, and verifying them. These include test mode controllers, IO BIST, Memory BIST, JTAG. In addition you will be responsible for MBIST, scan insertion and ATPG and post silicon validation.

Responsibilities:
- Full Chip DFT architecture and planning.
- Responsible for DFT implementation and verification including MBIST/Scan insertion, ATPG and pattern verifications.
- Working closely with PD/PR team to close test timing and resolve dft related backend issues.
- Responsible for ATE chip bring up and failure analysis.

Minimum Requirement:
- BSEE required, MSEE preferred.  
- 2+ years of experience in DFT/design field
- Strong logic design and verification background with experience in STA.
- Must possess a strong knowledge of DFT including scan, ATPG, Test Compression, JTAG and BIST.
- Skilled in using of Perl, tcl and C/C++
- Excellent English communication skills
- Self-motivated and good team player

Tracy

Best Regards

021-61043650