senior IC 简历发ic@hi-talent.com

jj_seu

Senior IC 简历发ic@hi-talent.com

Position: Senior IC Engineer（上海）

Responsibilities:

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Independently handle key IC design tasks:

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Block level Micro-architecture, RTL Design, Verification, Synthesis and timing closure.

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Top level integration, including clock/reset implementation, synthesis and timing closure.

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FPGA validation and Silicon bring-up.

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Participating in company’s key engineering initiatives: Methodology improvement, new architecture study and proposal.

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Coordinating joint development with 3rd party:

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IP selection/management and vendor coordination

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Interface with 3rd party vendor for successful execution

Requirements:

Must have:

- BSEE Degree or equivalent

- 3-5 years of experience in hands-on IC design

- Familiarity with asic design methodology and SoC architecture.

- Familiarity with standard CAD tools including simulation, synthesis, formal verification tools.

- Self-motivated in solving problems

- Good communication skills and fluent in English.

- Good team player.

A plus to have:

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Good scripting skills.

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DDR design experience.

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Experience in DFT.

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Experience of mobile chip development

Best Regards

Scarlett.Jane.Jin

Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd.

上海芯相会企业管理咨询有限公司

上海芯得企业管理咨询有限公司

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