AMD上海招聘验证工程师

RecruiterAMD

AMD上海研发中心热招以下职位，请感兴趣的把简历发送至 maggie1.zhang@amd.com, 并注明所应聘职位，谢谢。

1. Senior/MTS verification engineer for NBIO team

    

Job Summary:

  

  

nBIF verification

  

  

  

    

Job Responsibilities:

  

  

  For all stages of verification on dGPU and APU, including developing  testbenches, modeling, assertions/checkers/monitors, test plan & test  development, regressions, and infrastructure development. Responsibility  includes participating in the pre-silicon blocks, chip, multi-chip and system  level verification on emulation platform.

  

  Details:
  1) building testbench, creating testplan, createing test and debugging for  both IP and SOC level.
  2) Apply necessary verification methodologies to ASIC design, such as  coverage, assertion, randomization , etc to achieve the verification goals.
  3) Regular communication via Audio/Video conference with teams in North  America

  

  

    

Job Requirements:

  
    

Education& Qualifications:

  

  

1.
Candidate is preferred to be MSEE with minimum of 2 years,  or BSEE with minimum of 4-year experience in digital ASIC/SOC design  verification.

  

  
    

Experience:

  

  

1.
A  solid foundation of Computer Architecture and Operating system

  

2.
Have  complex ASIC/SOC Design Verification, direct experience in SOC or Processor  (GPU or CPU) or Industry bus standard (PCI-e, AXI, AMBA) .

  

3.
Good  knowledge of Verilog/SystemVerilog/C/C++/UVM or VMM and debugging in Linux  platforms.

  

4.
Be  skillful in shell/perl/Makefile programming in linux OS.

  

5.
Good  English hearing, speaking, reading and writing capabilities.

  

  

2. Senior/MTS verification engineer for memory control

- Understand thearchitecture of the chip and functional block being designed
- Build C/C++ model for simulation
- Build test bench and monitors for DUT
- Compose test plan and validation vectors to ensure functional completeness
- Debug function/performance bugs of graphics chips

Preferred Experience:
- Major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+years working experiences
- Familiar with Linux Environment (including shell scripting and linux gnutools)
- Experience with design for verification (assertion based design strategies,code coverage, functional coverage, test plan, gate-level simulation,back-annotation etc.)
- Should be versatile in any one of the high level verification flow such asSV,VMM,VERA,OVM etc as well as knowledge of industry standard tools forverification
- Should have excellent communication skills (both written and oral)
- Strong problem solving skills