- Understand thearchitecture of the chip and functional block being designed
- Build C/C++ model for simulation
- Build test bench and monitors for DUT
- Compose test plan and validation vectors to ensure functional completeness
- Debug function/performance bugs of graphics chips
Preferred Experience:
- Major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+years working experiences
- Familiar with Linux Environment (including shell scripting and linux gnutools)
- Experience with design for verification (assertion based design strategies,code coverage, functional coverage, test plan, gate-level simulation,back-annotation etc.)
- Should be versatile in any one of the high level verification flow such asSV,VMM,VERA,OVM etc as well as knowledge of industry standard tools forverification
- Should have excellent communication skills (both written and oral)
- Strong problem solving skills
2. Senior ASIC CAD engineer
PositionSummary
1.
Participatein the design and implementation of the leading edge, front-end ASIC designflow
2.
Participatein the research of Design Methodology to improve automation and
productivity to produce AMD's new high-qualitycutting-edge APU and GPU products
3.
Technicalsupport and programming
4.
Interfacewith EDA vendors on technology
Requirements:
1.
Major in EE, CS or related, Master Degree with3+ years or Bachelor with 5+ years working experience
2.
Experience in Front-end digital design andVerilogHDL is required
3.
Good programming skill with one or morelanguages (e.g. Tcl, Perl , python, c/c++, etc.) in Unix/Linux and a strongdesire to automate flow
4.
Familiar with one or more ASIC flows (logicsynthesis, formal equivalence check, STA etc.) and usage of related EDA toolsis a plus
5.
Familiar with low power design is a plus
6.
Good written and spoken English
7.
Good communication skills and be able to workboth independently and in a team