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楼主: bonyou

新书: CMOS single chip fast frequency hopping synthesizers

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 楼主| 发表于 2007-3-27 21:21:36 | 显示全部楼层
part11

CMOS_single_chip_fast_frequency_hopping_synthesizers.part11.rar

618.92 KB, 下载次数: 114 , 下载积分: 资产 -2 信元, 下载支出 2 信元

 楼主| 发表于 2007-3-27 21:31:14 | 显示全部楼层
About this book                       
                        Recently, wireless LAN standards haveemerged in the market. Those standards operate in various frequencyranges. To reduce component count, it is of importance to design amulti-mode frequency synthesizer that serves all wireless LAN standardsincluding 802.11a, 802.11b and 802.11g standards. With differentspecifications for those standards, designing integer-basedphase-locked loop frequency synthesizers can not be achieved.Fractional-N frequency synthesizers offer the solution required for acommon multi-mode local oscillator. Those fractional-N synthesizers arebased on delta-sigma modulators which in combination with a divideryield the fractional division required for the desired frequency ofinterest.
In CMOS Single Chip Fast Frequency Hopping Synthesizers for Wireless Multi-Gigahertz Applications,the authors outline detailed design methodology for fast frequencyhopping synthesizers for RF and wireless communications applications.Great emphasis on fractional-N delta-sigma based phase locked loopsfrom specifications, system analysis and architecture planning tocircuit design and silicon implementation.
The book describes an efficient design and characterizationmethodology that has been developed to study loop trade-offs in bothopen and close loop modelling techniques. This is based on a simulationplatform that incorporates both behavioral models andmeasured/simulated sub-blocks of the chosen frequency synthesizer. Theplatform predicts accurately the phase noise, spurious and switchingperformance of the final design. Therefore excellent phase noise andspurious performance can be achieved while meeting all the specifiedrequirements. The design methodology reduces the need for siliconre-spin enabling circuit designers to directly meet cost, performanceand schedule milestones.
The developed knowledge and techniques have been used in thesuccessful design and implementation of two high speed multi-modefractional-N frequency synthesizers for the IEEE 801.11a/b/g standards.Both synthesizer designs are described in details.

Written for:
RFIC, RF, wireless IC and systemdesign engineers and academics involved in the teaching, research,design and/or implementation of high purity and fast switching speedfrequency synthesizers for various wireless applications and standardssuch as GSM, WLAN and WIMAX

        Keywords:
        Delta-sigma
        Fractional-N
        Frequency
        Noise-shapping
        Synthesizer
cover-image-large.jpg
 楼主| 发表于 2007-3-29 08:32:45 | 显示全部楼层
nobody interested t oknow how to apply sigma delta in the frequency synthesizer?
 楼主| 发表于 2007-4-1 21:24:47 | 显示全部楼层
这本也是新书, 快来买啊, 好书啊.
 楼主| 发表于 2007-4-6 22:01:04 | 显示全部楼层
now is free for you... download it now..
 楼主| 发表于 2007-4-7 19:39:09 | 显示全部楼层
this a new release from springer, looks like not many are interested?

[ 本帖最后由 bonyou 于 2007-4-14 19:52 编辑 ]
发表于 2007-4-8 16:44:18 | 显示全部楼层
Ding ding, thanks
 楼主| 发表于 2007-4-16 23:23:09 | 显示全部楼层
you are welcome. xiexie
发表于 2007-4-16 23:34:51 | 显示全部楼层
发表于 2007-4-16 23:37:49 | 显示全部楼层
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