Cadence SH 招聘高级数字后端产品测试工程师

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Cadence SH 招聘高级数字后端产品测试工程师Joblocation: Shanghai更多职位信息敬请关注Cadence公众微信平台：Cadence中国招聘 Ifyou have interest, PLS send your update CV to zhangyl@cadence.com 1.   Lead Product Validation Engineer-STAPosition Description:     1. CadenceICD Product Validation Analysis Team mainly focus on STA and Low Power relatedarea in digital design backend flow.2. Thisposition is responsible for developing, applying and improving qualitystandard    forCadence Lower Power flow and Encounter common timing engine .3.Thecandidate needs to test Low Power Solution and timing analysis result in commonand special usage flows.  DetailedResponsibility:1.IdentifyLow Power solution and timing sign-off challenges in complex SOC designs andadvacned process nodes2.Proactivelyprovide Low Power & STA & Sign-off development suggestions to R&D.3.Buildup Lower Power & STA & Sign-Off expertise and deliver support to fieldteam and customers whenever needed.4.Requiredto acquire expertise and ownership over existing product components as well asdevelop brand new product features.

5.Projectleader on important Low Power or STA features.

Position Requirements:

1.Bachelorwith 6 years related experience or Master with 4 years related experience indesign house, FAB or EDA company.2.Richexperience in IC design flow (front-end or back-end).3.Experiencein STA and SI analysis, or experience in Low Power flow, knowledge in parasiticextraction and signoff is a strong plus.4. GoodUnix System knowledge and script skill of TCL/TK/CSH/PERL.5.Excellentcapability of self-learning, problem solving skills;6.Beingproactive and self-motivated;7.strongleadership;8.Goodwritten English and oral English is a strong plus 2.   Senior Product Validation Engineer
Position Description:         Work in EncounterNanoRoute Product Validation team. The responsibilities include:1. Assist in Cadence EDI flow development andvalidation2. Validate and maintain comprehensiveNanoRoute unit and flow test cases for Encounter Digital Implementation System.3. Develope test suites of the new features ofCadence's EDI router.      Position Requirements:    1.CS/EE BS degree with 3+ years or MS degreewith 1+ year work experience2.Digital IC design knowledge is necessary,physical verification (DRC/LVS) and layout knowledge is plus3.Unix System knowledge, vi/TCL/TK/CSH/Perlwill be plus.4.Good communication in English and Chinese,good confidence and self-motivation. 3. Senior Product Validation Engineer (for GPS) Position Description: Thisengineer will work in Encounter GPS (Global Physical Synthesis) productvalidation team. The responsibilities include:a) Assist inCadence EDI development and validationb) Validateand maintain comprehensive GPS unit and flow test cases for Encounter DigitalImplementation System.c) Developtest suites of the new features of EDI GPS function   Position Requirements: a)MS ofEE/CS b)Digital ICdesign knowledge is necessary, statistic timing analysis knowledge is a strongplusc)UnixSystem knowledge, vi/TCL/TK/CSH/Perl will be plus.d)Goodcommunication in English and Chinese, good confidence and self-motivation.