Cadence SH 招聘高级数字后端产品测试工程师

kengteng

Cadence SH 招聘高级数字后端产品测试工程师

Job location: Shanghai

更多职位信息敬请关注Cadence公众微信平台：Cadence中国招聘

If you have interest, PLS send your update CV to zhangyl@cadence.com

1.Product Validation Engineer - Software System

PositionDescription:

Cadence ICD ProductValidation Regression system is the core system infrastructure of the wholeProduct Validation organization, which can greatly improve the wholeorganization's efficiency and boost the team productivity.

This position is responsible for the regression systemand application development and maintenance.

The candidate need use all kinds of knowledge andskills to design and improve the system based on the business requirement forthe organization operation and the existing system and relatedsoftware/hardware environment.

Detailed Responsibility:

1. Analyze System and Business requirement, based onwhich design the system flow chart

2. Do the needful system/scriptsmaintenance/improvement

3. Communicate with related IT and PV team and driveto improve organization operation efficiency

4. Innovate on the next generation system to boostorganization's efficiency

PositionRequirements:

Bachelor degreeis needed.

1. Result driven and details focused working attitude

2. Excellent analytical skills and complex systemproblem solving skills

3. Strong technical experience in Unix/Linux usage

4. Strong Perl/Tcl/Cshell scripting

5. Good knowledge and experience in CGI programming

6. Good knowledge in SQL database

7. Knowledge in Web programing (javascript, php,Python, XML) is a strong plus

8. Knowledge in NFS/Distributed Processing/ServerFarm/Network is a strong plus

9. Good written English and oral English is a strongplus

Product Validation

2.   Lead Product Validation Engineer-STA

PositionDescription:     

1. Cadence ICD Product Validation Analysis Teammainly focus on STA and Low Power related area in digital design backend flow.

2. This position is responsible for developing,applying and improving quality standard   

for Cadence Lower Power flow and Encountercommon timing engine .

3.The candidate needs to test Low PowerSolution and timing analysis result in

common and special usage flows.

Detailed Responsibility:

1.Identify Low Power solution and timingsign-off challenges in complex SOC designs and advacned process nodes

2.Proactively provide Low Power & STA &Sign-off development suggestions to R&D.

3.Build up Lower Power & STA & Sign-Offexpertise and deliver support to field team and customers whenever needed.

4.Required to acquire expertise and ownershipover existing product components as well as develop brand new product features.

5.Project leader on important Low Power or STAfeatures.

Position Requirements:

1.Bachelor with 6 years related experience orMaster with 4 years related experience in design house, FAB or EDA company.

2.Rich experience in IC design flow (front-endor back-end).

3.Experience in STA and SI analysis, orexperience in Low Power flow, knowledge in parasitic extraction and signoff isa strong plus.

4. Good Unix System knowledge and script skillof TCL/TK/CSH/PERL.

5.Excellent capability of self-learning,problem solving skills;

6.Being proactive and self-motivated;

7.strong leadership;

8.Good written English and oral English is astrong plus

2.   SeniorProduct Validation Engineer

Position Description:         

Work in Encounter NanoRoute Product Validation team. Theresponsibilities include:

1. Assistin Cadence EDI flow development and validation

2.Validate and maintain comprehensive NanoRoute unit and flow test cases forEncounter Digital Implementation System.

3.Develope test suites of the new features of Cadence's EDI router.

      Position Requirements:   

1.CS/EEBS degree with 3+ years or MS degree with 1+ year work experience

2.DigitalIC design knowledge is necessary, physical verification (DRC/LVS) and layoutknowledge is plus

3.UnixSystem knowledge, vi/TCL/TK/CSH/Perl will be plus.

4.Goodcommunication in English and Chinese, good confidence and self-motivation.

3.   SeniorProduct Validation Engineer- flow QR

Position Description:

This job is a very important to qualifyEncounter Design System's place & route flow quality and performance.

Detail description:

1) Responsible for setting up a design suite toqualify Encounter tool by running flow from RTL synthesis, placement, clocktree synthesis, routing and optimization.

2) She/he needs to monitor whole flow resultquality, analysis and found the reason of any QOR degradation, including timing

3) Degradation, DRC degradation, runtime ormemory degradation, etc.

4) She/he need to regularly send reportsummary.

5) Need to write necessary script to improveefficiency and productivity.      

Position Requirements:         

Bachelor in EE major with 2 years relatedexperience or Master in EE major.

1. Result driven and details focused workingattitude

2. Good knowledge in placement, routing, clocktree synthesis, STA, low power concept, etc.

3. Good technical experience in Unix/Linuxusage. Perl/Tcl/Cshell script is plug.

4. Good written English and oral English. Goodteam work ability.

5. Strong problem analysis ability and solvingability. Can work hard, and work actively under pressure.

1. SeniorProduct Validation Engineer (for GPS)

PositionDescription:

This engineer will work in Encounter GPS(Global Physical Synthesis) product validation team. The responsibilitiesinclude:

a) Assist in Cadence EDI development andvalidation

b) Validate and maintain comprehensive GPS unitand flow test cases for Encounter Digital Implementation System.

c) Develop test suites of the new features ofEDI GPS function

PositionRequirements:

a)MS of EE/CS

b)Digital IC design knowledge is necessary,statistic timing analysis knowledge is a strong plus

c)Unix System knowledge, vi/TCL/TK/CSH/Perlwill be plus.

d)Good communication in English and Chinese,good confidence and self-motivation.

4. SeniorProduct Validation Engineer (for GPS)

PositionDescription:

This engineer will work in Encounter GPS(Global Physical Synthesis) product validation team. The responsibilitiesinclude:

a) Assist in Cadence EDI development andvalidation

b) Validate and maintain comprehensive GPS unitand flow test cases for Encounter Digital Implementation System.

c) Develop test suites of the new features ofEDI GPS function

PositionRequirements:

a)MS of EE/CS

b)Digital IC design knowledge is necessary,statistic timing analysis knowledge is a strong plus

c)Unix System knowledge, vi/TCL/TK/CSH/Perlwill be plus.

d)Good communication in English and Chinese,good confidence and self-motivation.