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Job Requirements: -Co-work with P&R designer to assembly the chip level layout;
-Design and analyze ESD/latch-up/anti-interference layout structure;
-Work with circuit designers to build physical design floor-plan;
-Complete the physical layout design with the constraints of circuit design requirements;
-Verify the physical layout design to meet both circuit design requirements and process requirements;
Qualifications:
-College degree (or above) in Electrical Engineering or other related engineering field;
-At least 4 years experience in layout design field with rich tapeout experience;
-Good understanding of basic electronic principles dealing with circuit and layout design;
-Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout, Caliber physical verification;
-Prefer experienced in ESD and IO design
Place:
Shanghai, Zhangjiang
If you are interested, please send your CV to: hr@macrogiga.com
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