英伟达最新职位招聘更新，地点：北京上海

zxtcuo

有些岗位没有找到合适的人，有的岗位是新出的，希望有适合你的~

如果你对这些岗位有兴趣，可以将简历发送到：nvidia.china.hr@gmail.com

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工作地点：上海

工作类别：硬件研发

招聘职位：

ASIC DesignEngineer：

SENIOR ASIC ENGINEER

RESPONSIBILITIES:
- ASIC Design for graphics and video processors.
- Micro-architecture definition; working closely with video / graphics andsystem architects.
- RTL design, verification, emulation, synthesis, timing, and silicon bring-up.

MINIMUM REQUIREMENTS:
- Senior ASIC / Logic Design engineers with previous experience in Video,Graphics, Microprocessor Design, SOC design, or Multimedia ASIC design.
- Strong logic design and verification skills.
- Verilog and Synopsys experience required. Primetime experience desirable.
- Programming skills in C and PERL.
- Good communication skills and proven ability to work well within a team.
- The ideal candidate will be familiar with all aspects of the frontend ASICdesign flow including RTL design, verification, synthesis, and timing analysis
- BS in Electrical Engineering, MS preferred.

Senior Video AsicEngineer：

Position Title:	Sr. ASIC Engineer (Video)
JOB DESCRIPTION:   -The video ASIC engineer is expected to co-work with video architect to  define video architecture/micro-architecture, building NVIDIA's next  generation of video codec engines, which comply major video standards.    MINIMUM REQUIREMENTS:      - BS/MS in electrical/computer engineering and related.   - 3+ years experience in ASIC design. Strong design/implementation skills in Verilog.  Solid understanding in timing/power optimization skills of digital design.   - Broad knowledge with video and image processing techniques and with digital  video compression standards such as MPEG-2, MPEG-4, H.264/SVC, H265, VP8, and  VP9 is a big plus.   - Perl scripting skills is appreciated as a plus.   - Fluent English (both written and spoken) and excellent communication skills   - Demonstrated ability to work independently as well as in a  multi-disciplinary group environment

ASIC PhysicalDesign Engineer

GPU ASIC Physical Designengineer

As a senior member of our ASIC-PD team, you'll be working on streamlining thechip infrastructure process across product designs, focusing on full chiplayout planning (partitioning, planning clock distribution and other structure,methodology), partition/full chip timing closure (primetime scripts, othertools, etc) and gate-level design of high-speed logic

RESPONSIBILITIES:

Chip integration andnetlist generation

-Synthesis, Formalverification, netlist quality check

Work in conjunction withPlace and Route Engineers to achieve timing closure for both partition leveland full chip level

Develop and enhance entiretiming flow from frontend (pre-layout) to backend (post-layout) at both chipand block level.

Develop custom timingscripts using tcl/primetime for clock skew analysis, special circuits such asclock dividers, core logic <-> IO macros interfaces such as PCI-E, Frame-Buffer/Memory,TMDS, etc.

Develop flow to physicallypartition and floorplan the entire chip.

Develop scripts for performing ECO's.

MINIMUM REQUIREMENTS:

BS or MS in Electrical Engineeringor Computer Science

Above 3 years of relevantASIC experience ideally with a focus in the chip integration /synthesis/formaland timing closure

- Excellent scripts skills

- Excellent written andverbal communication skills in English

- Ability to multiplexmany issues, set priorities, and work in a team environment

- Keep up to date withleading edge technologies

Physical DesignEngineer

Sr. PHYSICAL DESIGNENGINEER

DESCRIPTION:

A senior role in physicaldesign for NVIDIA GPU and Mobile chips

Participate in various aspectsof physical design, including full chip floorplanning, power/clock distribution,timing optimization, place & route, timing closure, power/signal integrityanalysis, and physical verification

Troubleshoot a widevariety of des软件研发

ign and flow complicatedissues, and apply proactive intervention

Collaborate with RTL, DFTand Circuit designers to ensure the high quality of design implementation andoptimization

MINIMUM REQUIREMENTS:  

BS in Engineering orScience

Power user of EDA  tools from Synopsys (ICC/DC/PT/STAR-RC),Cadence (EDI/EPS) or Mentor (Olympus-SOC)

Experience in Clock/PowerDistribution, P&R, Timing closure,  RC Extraction, and verification on 40nm, or28nm technology

3+ years of experience inabove areas

PREFERRED:

MS in Engineering orScience

Knowledge in 20nm orFinFET technology, circuit design, and package design

Experience in physicalverification tools from Synopsys (ICV/Mojave) or Mentor (Calibre)

Proficiency in Perl, TCLand Makefile scripts

Senior ASICVerification Engineer (Power)

Position Title: SeniorASIC Verification Engineer (Power)

JobDescription/Qualifications:

Responsibilities:

-  Developing/Maintaining verificationenvironment, including testbench, regression system

- Developing test plansfor and verifying the function of ASIC power/clock control IP

- Responsible for verificationcompleteness, including coverage, drive bug to close, metrics for verificationquality

-Monitoring and reviewtest code

Requirement:

- At least 5+ years ofASIC verification experience (MS, EE) or equivalent BS EE, CE, CS.

- The successful candidateshould have experience going through at least one complete and successful ASICdesign/verification cycle from architecting and creating ASIC test environmentto full completion of the verification work.

- Strong programmingskills in Perl, Makefile and Verilog/Verilog-PLI/C/C++

- Working Experience withUVM/OVM/VMM (at least one of them)

- A strong communicationskill in both Chinese and English is required.

- Knowledge of powermanagement design/verification is a plus

工作类别：软件研发

ComputeArchitecture

The NVIDIA GPU ComputingArchitecture group is looking for world class computer architects andscientists to join and lead our effort to advance the state of parallelcomputing.  Our team is designing thefastest and most efficient parallel architectures that power energy-efficientsmart phones and the world's fastest super computers.

RESPONSIBILITIES:

Enhance GPU architecturesto extend the state of the art in performance, efficiency, programmability andreliability

Analyze, tune andprototype key applications for new GPU architectures

Build model to predictperformance, power and reliability on future architecture

Design, and develop toolsto analyze, simulate, validate, and verify application performance

Collaborate across thecompany to guide the direction of GPU computing, working with software,research and product teams

DESIRED SKILLS andEXPERIENCE:

MS Degree in relevantdiscipline (CS, EE, Math). PhD helpful

Strong programming skillsin C or C++

Strong background incomputer architecture, compilers, parallel processing, signal processing and/orhigh performance computing

Experience incharacterizing and modeling system-level performance, executing comparisonstudies, and documenting and publishing results

Strong programming skillsin CUDA, Perl, OpenMP, MPI or Python is big plus

Experience in computervision, machine learning, and molecular dynamics is big plus

Senior Video ArchEngineer

JOB DESCRIPTION:   The video architects work closely with NVIDIA's 3D graphics architects to  help create products where the video and graphics features work together  synergistically. The video architect will be expected to work at NVIDIA in  the area of video architecture, algorithms, and software development,  building on NVIDIA's current architecture and products and helping to define  the next generation video architecture. In this capacity, the architect will  be expected to become familiar with NVIDIA's current architecture,  algorithms, products, and design methodologies, and support the development  of new algorithms and their hardware implementations. The architect will also  be expected to analyze the performance of proposed and current NVIDIA  products, and develop algorithms and architectures to support NVIDIA's  product plans. The focus of these developments will include video  compression, decompression, and processing such as advanced de-interlacing,  scaling, filtering, frame-rate conversion, telecine detection, and video  noise/artifact elimination. In pursuit of this development, the architect  will be expected to document the mathematical equations involved in the algorithms,  generate test programs to validate the ideas, and create bit and cycle  accurate software models to assist with hardware design and verification.   MINIMUM REQUIREMENTS:   - M.S./PhD. in signal processing, applied mathematics, computer science,  electrical engineering and related discipline with good mathematical  knowledge   - 3+ years strong experience in algorithms development in one or some of the  following signal processing technologies: digital video hardware or software  codec development; computer vision/image processing/multimedia database  design; embedded DSP software development; real-time and embedded system  design.   - Broad knowledge with video and image processing techniques and with digital  video compression standards such as MPEG-1, MPEG-2, MPEG-4, H.263, H.264/SVC,  Windows Media Video, H265, VP8 and VP9.   - Solid software skills - C, C++.   - Fluent English (both written and spoken) and excellent communication skills   - Demonstrated ability to work independently as well as in a  multi-disciplinary group environment   - Experience in the following areas is a plus:   o Familiar with Compute architecture   o Scripting language (Perl, Python, Ruby)   o Understand Verilog, VHDL

MOBILE SYSTEMSOFTWARE ENGINEER

Position Title: MOBILESYSTEM SOFTWARE ENGINEER

Department: SW-TEGRA

Location: China, Shanghai,Zhangjiang Pk

Region: APAC

JobDescription/Qualifications:

You will work withsoftware engineers to develop and maintain ChromeOS/Linux support for NVIDIAmulti-core SOCs in clamshell, tablet and other applications. You will beinvolved in co-development and new technology development and support withstrategic NVIDIA partners and customers.

MINIMUM REQUIREMENTS

BS or higher degree in ComputerScience, Electrical Engineering or related degree.

2+ years of relevantsystem software/testing experience

Familiarity withChromeOS/Linux internal, computer system architecture.

Excellent programmingskills in Python, C and C++ Prior experience with manufacture mass-productionskill is a plus.

Prior experience withbios, uboot, coreboot skill is a plus.

Good communication andplan skills.

Proactive find outrevolution for technical issues and Drive the product to a best quality.

Must be willing to worktogether with partners and customers.

Must be willing to takenew challenge and adapt new technology

工作地点：北京

工作类别：硬件研发

Physical DesignEngineer

DESCRIPTION:

A senior role in physicaldesign for NVIDIA GPU and Mobile chips

Participate in variousaspects of physical design, including full chip floorplanning, power/clockdistribution, timing optimization, place & route, timing closure, power/signalintegrity analysis, and physical verification

Troubleshoot a widevariety of design and flow complicated issues, and apply proactive intervention

Collaborate with RTL, DFTand Circuit designers to ensure the high quality of design implementation andoptimization

MINIMUM REQUIREMENTS:  

BS in Engineering orScience

Power user of EDA  tools from Synopsys (ICC/DC/PT/STAR-RC),Cadence (EDI/EPS) or Mentor (Olympus-SOC)

Experience in Clock/PowerDistribution, P&R, Timing closure,  RC Extraction, and verification on 40nm, or28nm technology

3+ years of experience inabove areas

PREFERRED:

MS in Engineering orScience

Knowledge in 20nm orFinFET technology, circuit design, and package design

Experience in physicalverification tools from Synopsys (ICV/Mojave) or Mentor (Calibre)

Proficiency in Perl, TCLand Makefile scripts

工作类别：软件研发

Parallel ComputingSoftware Engineer

To spearhead itsbreakthroughs in High Performance Computing, NVIDIA is looking for apassionate, world-class Software Engineer to work in its Developer TechnologyTeam. In this role, you will open up new domains of application for GPUs byresearching and developing GPU computing algorithms, driving their adoptionwith key application developers and ensuring best possible performance of GPUcomputing applications on current and next-generation architectures.

Application domains include geosciences, life sciences, computer-aidedengineering, computational fluid dynamics, computational chemistry,computational physics, computational finance, electronic design automation, datamining, medical imaging, and many more.

RESPONSIBILITIES:
- Work directly with key US developers on their scientific applications,educating them on the latest NVIDIA technologies.
- Closely collaborate with the architecture and software teams at NVIDIA toinfluence the design of next-generation architectures.
- Some travel to conferences and for on-site visits with developers will berequired.

MINIMUM REQUIREMENTS:
- A good degree from a leading university in an engineering or computer sciencerelated discipline.
- Strong knowledge of programming languages such as Fortran and C/C++.
- Strong knowledge of programming techniques and algorithms.
- Strong mathematical fundamentals, including linear algebra and numericalmethods.
- Experience with parallel programming, especially data-parallel using MPI,OpenMP, OpenACC or CUDA C/C++/Fortran.
- Good communication and organization skills, with a logical approach toproblem solving, good time management and task prioritization skills.

With highly competitive salaries and a comprehensive benefits package, NVIDIAis widely considered to be one of the technology world?s most desirableemployers. We have some of the most brilliant and talented people on the planetworking for us and, due to unprecedented and ongoing growth, our world-classengineering teams are expanding fast. If you're a creative and autonomousSoftware Engineer with a genuine passion for parallel computing, we want tohear from you.

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