DFT 上海半个月内到位

jj_seu · 发表于 2014-5-30 13:41:24

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

您需要登录才可以下载或查看，没有账号？注册

×

DFT

职位职能:
集成电路IC设计/应用工程师

职位描述:

JOB  RESPONSIBILITIES
  The candidate is expected to be responsible for following tasks:
  - Participate in SOC full Chip DFT feature and architecture definition
  - Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog  Macro test logic
  - Generate DFT related timing constraints and work for timing closure
  - Develop and verify high coverage and cost effective test patterns for the  production test
  - Evaluate and establish the advanced DFT tools and flow

  EDUCATION REQUIREMENTS
  Bachelor degree in Electrical Engineering or related area, MSEE is preferred

  YEARS OF EXPERIENCE REQUIREMENT
  8+ years of experience in DFT design and verification, test pattern  development

  KEY KNOWLEDGE, SKILLS AND ABBILITIES REQUIRED
  - Good Knowledge of Scan/ATPG, MBIST and boundary scan and other DFT  techniques
  - Good Knowledge of industry DFT tools like TestKompress, FastScan, Tetra max  ,Tessent Mbist etc
  - Good knowledge of digital SoC/ASIC design, including STA, verification and  RTL coding
  - Proficient in hardware description languages such as Verilog, System  Verilog and VHDL
  - Good Knowledge of script language, such as Tcl, Python, Perl
  - Good English communication skills
  - Strong commitment to schedule and work quality, good team player