美资半导体巨头公司内部推荐模拟版图工程师上海

wlf928 · 发表于 2014-5-14 22:30:46

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Deliver block andwhole chip physical design according to schematic

*Basic Qualifications:
Basic understanding of Silicon process technology.
Basic understanding of both analog and digital circuit topology.
Understand matching technique and parasitic components come from various layoutstructures.
Have DRC/LVS experience, parasitic extraction and assembly rule checks.
Experience of whole chip layout work desired, including floor plan, ESDstructure, top level routing, digital core place and routing.
Native mandarine speaker.

3+ working experience

*Preferred Qualifications & Skills:
Need strong communication skill and cooperative spirit to work with designteam. English communication skill is a plus.
High voltage skill is a plus

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