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[招聘] Cadence SH 招聘高级数字后端产品测试工程师

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发表于 2014-5-7 12:05:39 | 显示全部楼层 |阅读模式

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Cadence SH 招聘高级数字后端产品测试工程师


Joblocation: Shanghai


更多职位信息敬请关注Cadence公众微信平台:Cadence中国招聘

Ifyou have interest, PLS send your update CV to zhangyl@cadence.com

1. Senior Product Validation Engineer (for GPS)

Position Description:

Thisengineer will work in Encounter GPS (Global Physical Synthesis) productvalidation team. The responsibilities include:

a) Assistin Cadence EDI development and validation

b)Validate and maintain comprehensive GPS unit and flow test cases for EncounterDigital Implementation System.

c) Developtest suites of the new features of EDI GPS function


Position Requirements:

a)MS ofEE/CS

b)DigitalIC design knowledge is necessary, statistic timing analysis knowledge is astrong plus

c)UnixSystem knowledge, vi/TCL/TK/CSH/Perl will be plus.

d)Goodcommunication in English and Chinese, good confidence and self-motivation.

2.   Principal/Lead PV Engineer

Position Description:     

1.CadenceICD Product Validation Analysis Team mainly focus on STA and Low   

2.Powerrelated area in digital design backend flow.

3.Thisposition is responsible for developing, applying and improving quality standard

for Cadence Lower Power flow and Encountercommon timing engine .

4.The candidate needs to test Low PowerSolution and timing analysis result in common and special usage flows.
Detailed Responsibility:

1.IdentifyLow Power solution and timing sign-off challenges in complex SOC designs andadvanced process nodes

2.Proactivelyprovide Low Power & STA & Sign-off development suggestions to R&D.
3.Build up Lower Power & STA & Sign-Off expertise and deliver supportto field team and customers whenever needed.

4.Requiredto acquire expertise and ownership over existing product components as well asdevelop brand new product features.

5.Projectleader on important Low Power or STA features.

PositionRequirements:

1.Bachelor with 6 years related experience orMaster with 4 years related experience in design house, FAB or EDA company.

2.Rich experience in IC design flow (front-endor back-end).

3.Experience in STA and SI analysis, orexperience in Low Power flow, knowledge in parasitic extraction and signoff isa strong plus.

4. Good Unix System knowledge and script skillof TCL/TK/CSH/PERL.

5.Excellent capability of self-learning,problem solving skills;

6.Being proactive and self-motivated;

7.strong leadership;

8.Good written English and oral English is astrong plus

2.   Senior Product Validation Engineer


Position Description:         

Work in EncounterNanoRoute Product Validation team. The responsibilities include:

1. Assist in Cadence EDI flow development andvalidation

2. Validate and maintain comprehensiveNanoRoute unit and flow test cases for Encounter Digital Implementation System.

3. Develope test suites of the new features ofCadence's EDI router.

      Position Requirements:   

1.CS/EE BS degree with 3+ years or MS degreewith 1+ year work experience

2.Digital IC design knowledge is necessary,physical verification (DRC/LVS) and layout knowledge is plus

3.Unix System knowledge, vi/TCL/TK/CSH/Perlwill be plus.

4.Good communication in English and Chinese,good confidence and self-motivation.

3.   Senior Product Validation Engineer- flow QR

PositionDescription:

This jobis a very important to qualify Encounter Design System's place & route flowquality and performance.

Detaildescription:

1)Responsible for setting up a design suite to qualify Encounter tool by runningflow from RTL synthesis, placement, clock tree synthesis, routing andoptimization.

2) She/heneeds to monitor whole flow result quality, analysis and found the reason of anyQOR degradation, including timing

3) Degradation,DRC degradation, runtime or memory degradation, etc.

4) She/heneed to regularly send report summary.

5) Needto write necessary script to improve efficiency and productivity.      

PositionRequirements:         

Bachelorin EE major with 2 years related experience or Master in EE major.

1. Resultdriven and details focused working attitude

2. Goodknowledge in placement, routing, clock tree synthesis, STA, low power concept,etc.

3. Goodtechnical experience in Unix/Linux usage. Perl/Tcl/Cshell script is plug.

4. Goodwritten English and oral English. Good team work ability.

5. Strongproblem analysis ability and solving ability. Can work hard, and work activelyunder pressure.

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