【上海全职招聘】AMD招聘MTS Verification 工程师

RecruiterAMD

AMD上海招聘资深工程师，请感兴趣的候选人务必以“所应聘职位_姓名_学历_专业_现公司

名称_工作年限”
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述应聘理由与优势。

MTS verification engineer

AMD System Management Unit(SMU) IP team delivers differentiatedsystem management IP for all AMD products. You'll be working with the globalteam on complicated clock scheme, security processing, network on chip, powermanagement, etc.

Requirement:

* candidate is preferred to be MSEE with minimum of 5 years, or BSEEwithminimum of 7 years experience indigital ASIC/SOC design verification.

* deep understanding on ASIC/SOC design flow

* Excellent knowledge ofdesign verification methodology, such as VMM or OVM andUVM.
* Solid experiences with simulation model creation and the testbench build
* Strong SystemVerilog experiences.
* Be good at scripting language, such as Perl, Cshell, Ruby, and Makefile.
* C/C++ software development experiences is a plus

It is a must that the candidate has one or more of the followingexperience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB)bus,low power design, clock generation and control, Legacy IPs(SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs(I2S/I2C/UART), JTAG, etc.

The candidate is expected to exhibit good verbal and written communicationskills in both Chinese and English, specialized knowledge plus broad technicalknowledge that facilitates integrative thinking, driving execution ofqualityand timely result, capability to solve complex, novel and no-recurringproblems and decision-making on critical technical areas.


Responsibility:
* Work with designer to get a full deep insight on the design under test
* Develop stressful testplan

* Build testbench
* Create testcase to ensure maximum coverage

* Develop verification IP which can be reused at different levels ofverfication: block level, sub-system level, SoC level, etc.