芯得咨询-欢迎回来简历发ic@hi-talent.net

jj_seu · 发表于 2014-2-7 21:14:59

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职位：集成电路IC设计/应用工程师

岗位职责：

l
This candidate should have mobile/high speed interface background and should be interesting in R&D on Video related technologies.

l
IC/IP background. Be interesting in developing and improving New IP.

l
Integration experience, be able to own testchip tapeout.

l
With at least 3-years IP/Product R&D experience.

Job Description

l
RTL coding, new logic design, simulation, synthesis.

l
Work closely with algorithm engineer to develop/debug new IP/product. Supports FPGA engineer debugging issues on FPGA system.

l
Work closely with system/SW engineer to verificate/validate new IP/product on FPGA/System platform.

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Deliver design/verification/application documents.

DSP Algorithm Engineer:

Job Responsibilities:

As a DSP (Digital Signal Processing) engineer for XXXX, the candidate will join a team of experienced scientists and engineers to develop exciting technology in image and video processing. The position will give you an opportunity to combine your ingenuity with the next generation products in TV and Panel industry. Typical duties performed as follow:

1.
Design and implementation of video post processing algorithm such as true motion based frame interpolation, super-resolution, noise reduction;

2.
Design and implementation of image algorithm such as local dimming, scaling, color enhancement, 2D to 3D

3.
Support the verification and optimization of algorithm according to HW requirements;

4.
Work with image quality team to improve image quality, and tune image quality according to requirements of customers.

Minimum Requirements

1.
Ph. D in EE/CS specializing in digital signal processing, image processing, video processing, computer vision, pattern recognition, or computer graphics;

2.
Thorough background in signal processing, image and video processing, statistical analysis and pattern recognition;

3.
Proven ability in designing, implementing, debugging and understanding complex algorithm;

4.
Solid programming skills in C/C++ and MATLAB;

5.
Strong analytical, creative, self-motivated, good communications skill;

6.
Enjoy R&D work, open and positive attitude;

Additional Preferred Skills

7.
Experience with IC design flow and methodologies; experiences with algorithm design targeted for IC and FPGA;

8.
Previously worked on video processing algorithms such as motion estimation, super resolution, deinterlacing, scaling, noise reduction is a big plus;

9.
Familiar with digital video algorithm and interfaces;

10.
Strong communication skills, presentation skills, good organization and skilled in writing high quality engineering documentation.

Title: senior or staff cad/methodology engineer

芯得咨询 简历发ic@hi-talent.net

Job Duties:

The candidate will collaborate with Sunnyvale CAD team to support Shanghai design center.

1) Industry leading edge ASIC design flow and methodology development

2) Design tools/script development to improve design automation and productivity

3) EDA tools evaluation, license set up and upgrade

4) Work with EDA vendors to solve design flow or tool issues

5) Design database management and maintenance

6) Local engineers working environment support and Linux/Unix servers/system support

Qualifications:

- Experience on CAD support for digital/analog/mixed-signal IC design

- Familiar with IC design flow related EDA tools (Synopsys, Cadence Mentor, etc.) setup under Linux environment

- Working experience in license set up for EDA tools, version control tools and bug trace tools

- Excellent script languages skills for internal tool development, such as Perl, Tcl, Shell, Skill and Python

- Experience in perl
development is a plus

- Customer oriented, good communication skill

- B.S. Degree or above in Electrical Engineering or Computer Science. Major in Microelectronics is a plus.

- At least 3-5 years CAD experience in IC design company

- English language skill in writing and speaking.

职位：集成电路IC设计/应用工程师

岗位职责：

l
This candidate should have mobile/high speed interface background and should be interesting in R&D on Video related technologies.

l
IC/IP background. Be interesting in developing and improving New IP.

l
Integration experience, be able to own testchip tapeout.

l
With at least 3-years IP/Product R&D experience.

Job Description

l
RTL coding, new logic design, simulation, synthesis.

l
Work closely with algorithm engineer to develop/debug new IP/product. Supports FPGA engineer debugging issues on FPGA system.

l
Work closely with system/SW engineer to verificate/validate new IP/product on FPGA/System platform.

l
Deliver design/verification/application documents.

1.Senior ASIC Digital Design Engineer

Responsibilities:
l  Responsible for logic design and verification in low-power wireless communications chips.
l  Also responsible for module-level lint checking, timing checking and formal verification.
Qualifications:
l  Proficiency in logic design, simulation, synthesis and testing.
l  Proficiency in Verilog and its simulation environment.
l  Experience with low-power design.
l  Good knowledge of SOC design.
l  Experience in wireless communication or multimedia technologies is a plus.
l  Experience in ARM and AMBA design is a plus.
l  Self-motivated and good team player.
l  MSEE or BSEE with 4+ years.

2.高级芯片后端设计工程师

Job Description
1、参与超大规模SOC芯片物理设计的全流程；
2、挑战实现业界速度最快、功耗最低的高性能SOC芯片；
Qualification
1、本科4年以上相关工作经验（硕士3年以上相关工作经验），并有实际的tapeout经验；
2、熟练掌握深亚微米后端物理设计流程；