招聘-(高级)数字IC设计工程师

fcwr_004

职位描述: JOB DESCRIPTION: - Module-level architecture definition and design - Module-level RTL implementation - Simulation/Verification at both module level and system level - Module-level synthesis and timing analysis - Writing design spec and report - FPGA/silicon debug on related modules QUALIFICATIONS: - Minimum 1-year experience on digital IC design for a Jr. engineer position and 3-year experience for Sr. engineer position - Solid knowledge on digital IC design - Strong skills of Verilog RTL coding and simulation - Hands-on experiences on EDA tools, such as Cadence and Synopsys tools - Familiar with C language - Relevant experiences on DDR2 control or video display are plus - Hardworking and self-motivated - A team player 如有意向，欢迎访问IC人才网链接投递简历http://www.jobic.cn/zhaopin/job_58332.html 简历接收邮箱：mina@jobic.cn      chao.zhou@montage-tech.com

jackychan2010

地点？

huanguestc002

location?/？？？

fcwr_004

工作地点：上海

fcwr_004

有几个哥们投递了简历，用人部门反馈质量较高，有意向请尽快投递简历。