美光半导体技术-SSD ASIC Verification

ellawang

Dear All, Micron is now looking for talents who are familiar with UVM/OVM/VMM verification method.

Those who are interested in this position, please kindly contact Ella Wang via ellawang@micron.com

P.S. this position will be locate in Shanghai

Here I attached the JD below for your reference.

SSD ASIC Verification

Job Description

As an SSD ASIC Verification Engineer at Micron, you will part of a team that develops leading edge System On Chip solutions for Micron.  You will be part of a team that is driving innovation into next generation solid state memory controllers and the resulting storage and server products.

Responsibility:

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Defining, designing & verifying, modeling, and implementing of controllers for Micron's SSD efforts.  

·
Developing design specifications, conducting hardware architecture & design tradeoffs, mapping NAND management algorithms into hardware implementations, performing logic design, implementation and block verification.

·
Working in close collaboration as part of a team that includes other Digital Designers, Verification and Firmware Engineers, System and Algorithm Engineers, Physical Design Engineers and FPGA Engineers.

Qualification:

·
Proven track record of contributing to the development of ASIC based products by assisting with the overall concept, design and optimization of digital and analog ASIC circuits.

·
Good background in Verilog/SystemVerilog and verification methodology; knowledge of C or other HVL would be a plus

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Proficiency in Verification techniques, at both a block and system level, to work with the verification engineering team to support excellence in design principles and practice

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Knowledge and experience performing timing analysis/debug and implementing design improvements.

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Experience in developing block and chip level test benches, test plan creation.

·
Experience with OVM/UVM, object oriented design principles, Mentor Questasim SV, Power Aware, SVA assertion.

·
The ability to work with firmware teams in developing co-simulation environments and system models

·
Good communication skills, with the ability to convey complex technical concepts to other design peers in verbal and written form.

·
A high level of self-motivation and the ability to be a self-starter.

·
Good written, verbal and presentation communication skills.

·
BS in EE/CS with 3+ years work experience or MS in EE/CS with 1+ year work experience

duanli112

where

ellawang

回复 2# duanli112


    base 在上海

jooz

你们是不是asic deisign的职位不要人了？

ellawang

回复 4# jooz


    目前ASIC design的职位已有较属意的人在谈

ellawang

欢迎投递简历给我

cintasayang

回复 1# ellawang


     thanks for sharing