猎头职位--Physical Design Engineer & Senior Design/verificat

bestgrace

JOB TITLE:  
Sr. Physical Design Engineer  


DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:

Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level (full chip) floor planning, timing closure, place & route, physical verification etc.  


PREFERRED EXPERIENCE:

- PhD with 1+ years of industrial experience or MSEE with 3+ years of industrial experience in ASIC design

- Expertise in place and routing, signal integrity, power analysis, CTS design, DFT, design rule and connectivity verification, timing closure.  
- Successfully gone through complete product development cycle. Good analytical and debugging skills

- Good listening, writing and speaking English.  
- Good communication skills, strong interpersonal skills and the flexibility. Dedicated, hard working and good team player  
- Familiar with Back-End (physical design) EDA tools (synopsys, cadence, magma)  
- Familiar with Front-End EDA tools or circuit design is a plus  
- Familiar with Unix/Linux environment and good at scripts  






Job Title:  
Senior Design Engineer for Video Codec

Role and Chance

- Participate IP and SoC level architecture definition, derive functional and design specifications and analyze feasibility of technical and architectures.

- Implement design with Verilog to achieve specification goals. Simulate and debug the codes in coding stage.

- Go through the FE design flow to deliver qualified netlist. Feedback to Physical Design team to help to close timing and check floorplan.
- Write ASIC specific part of test plan. Co-work with verification engineers to prove functional correctness from block level to SoC level

- Support FW/SW bring-up and debugging

- Working as the technical point of contact on the ASIC area.

- Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.



Preferred Experience:

- Major in EE & CS

- Proven ASIC / SoC Design Experience (5+ years as a bachelor, 3+ years as a master).

- Must have strong background on IP development

- Must be proficient in Verilog coding, debugging and modeling

- Must be skilled in ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc.

- Must be skilled in mainstream EDA tools for design and simulation such as ncsim /vcs, RC/DC, PT, Formality/LEC and DFT.

- Must be familiar with verification methodologies for from block level to SoC level.

- Should be familiar with shell/perl /tcl programming in Linux OS.

- Should be familiar with P&R and Manufacture tech.

- Good English hearing, speaking, reading and writing capabilities.

- Will be a big plus if having mass production tape‐out experience.

- Will be a plus if having C/C++/SystemVerilog experience





Job Title:  
Senior Design Verification Engineer for Video Codec

Role and Chance

With increase in ASIC design complexity, design verification becomes an important aspect of the design flow. The candidate will be working in the areas of high speed BUS design and verification for SoC / IP projects. This position requires the candidate to work closely with the ASIC designers on understanding the functional block being designed; compose test plan and validation vectors to ensure functional completeness according to the design specification; apply most advanced verification methodologies to DUT; write BFM model and reference model; and develop and maintain advanced test environments.  


Preferred Experience:

- Bachelor/Master Degree in Electrical or Computer Engineering.

- Proven ASIC / SoC Design Verification Experience (5+ years as a bachelor, 3+ years as a master).

- Advanced C/C++/SystemVerilog, RTL coding techniques.

- PCIe, BIOS, Kernel Driver experience would be an asset.

- Design for verification (assertion based design strategies, code coverage, functional coverage,

test plan, gate-level simulation, back-annotation etc.)

- Hardware emulation, System Performance modeling and analysis

- Strong verbal and written communication skills.

- Strong problem solving skills.

- Ability to be flexible in terms of responsibilities and hours.



Job Title:  
Physical Design Engineer (Intern)



Role and Chance

Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level (full chip) floor planning, timing closure, place&　route, physical verification etc.  


Skill and Experience Requirements  
- Can guarantee fulltime work from Monday to Friday for 6 months (MUST)

- Master of EE.  
- Knowledgeable in all aspects of deep submicron ASIC design flow  
- Familiar with Back-End (physical design) EDA tools  
- Familiar with Unix/Linux environment and good at scripts







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