[猎头]智能手机Sr. ASIC Engineer

bestgrace

mobile和high speed interface方面的asic 设计人才

Position: Sr. ASIC Engineer

  

1. This candidate should have mobile/high speed interface background and should be interesting in R&D on Video related technologies.

2. IC/IP background. Be interesting in developing and improving New IP.

3. Integration experience, be able to own testchip tapeout.

4.  With at least 3-years IP/Product R&D experience.

  

Job Description

-       RTL coding, new logic design, simulation, synthesis.

-       Work closely with algorithm engineer to develop/debug new IP/product. Supports FPGA engineer debugging issues on FPGA system.

-       Work closely with system/SW engineer to verificate/validate new IP/product on FPGA/System platform.

-       Deliver design/verification/application documents.

Qualification and Experience

-     Very familiar with the Verilog HDL language;

-     Create the RTL architecture for the algorithm;

-     Very familiar with C and C++;

-     Familiar with FPGA tool, ModelSim, and Synplify.

-     Familiar with the flow of the IC design.

  

Requirements:

-    Bachelor/Master degree in electronic/computer engineering

-    Demonstrated abilities in working independently

-    Strong communication skills







E-Mail: bestgrace@qq.com

QQ: 2043753191

新浪blog:
http://blog.sina.com.cn/u/1767088102



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