在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 1775|回复: 1

[招聘] Physical Design的人才们看过来呀!!!

[复制链接]
发表于 2013-8-22 15:17:43 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
上海,资深的Physical Design的亲人们看过来呀看过来~~~
QQ1247070482(请备注来自eetop论坛)
电话13661504454

小白在这等着你过来,等着你过来,看那钱花儿开!!!
Position Description:Perform physical design implementation, including synthesis, floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, physical verification (DRC/LVS/Antenna), EM/IR signoff, DFM Closure, and physical design project management.

The candidate will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed design. The responsibility includes participating in or leading next generation physical design, methodology and flow development.
Position Requirements:BS degree with 5~10+ years of applicable experience, MS degree with 4~7+ years of applicable experience in electrical engineering, microelectronics. Experienced with ASIC design flow, hierarchical physical design strategies, and methodologies and understand deep sub-micron technology issues. Solid knowledge on LP Design, DFT, static timing analysis, EM/IR-Drop/crosstalk analysis, formal verification, physical verification, DFM. Successful track records of taping out complex, 65/40/28 nm SOC chips. Automation and programming-minded, solid coding experience in Makefile/Tcl/Tk/Perl. Self-motivated, able to work independently or as a team player, excellent verbal and written communication skills in English.
 楼主| 发表于 2013-8-23 13:12:01 | 显示全部楼层
快来啊
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条


小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-11-19 18:27 , Processed in 0.014285 second(s), 6 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表