Cadence SH 招聘Principal/Lead PV Design Engineer

kengteng

Cadence SH 招聘Principal/Lead PV Design Engineer

If you have interest, PLS send your CV to zhangyl@cadence.com


Job Title:        Principal/Lead PV Design Engineer

Job description:
1.        As an Encounter product validation engineer, he/she will contribute to overall Encounter quality/stability and usability, enable designs easier to finish design timing closure and chip finishing.
2.        Need to run different designs from placement/cts/optimization to final SI timing closure, need to look at those timing degradations and analysis the reason, whether placement is not good, or optimization insert unreasonable buffers, or routing pattern is detour, etc. Also need to analysis those max_tran/max_cap/DRC/power issues.
3.        Need to take new designs to add into regression suite. By given library and RTL netlist, she/he need to create floorplan, create powerplan, go through APR flow to achieve DRC clean and timing closure, to get reasonable Performance/Power/Area metric, just like taping out designs.
4.        Can explore new flows or methodology to improve timing closure efficiency, and give customer support.

Position requirements:
1. Ph.D or excellent MS which is familiar with APR flow.
2. Good at STA. Know about place, routing, cts, optimization and SI analysis is a plus.
3. Know about RTL synthesis
4. Good at unix scripts, cshell. Perl is a plus
5. Strong ability in analysis and solving issues, strong ability in facing difficulty and challenges. Proactive in work.
6. Good English skill, communication skill and good team work.


Job Titleead PV Engineer

Position Description:        
1.This job is an important addition to our R&D team to develop Cadence Encounter Digital Implementation System (EDI)
2.Responsible for developing, applying, and improving quality standard for Cadence EDI products
3.Required to acquire expertise and ownership over existing product components as well as develop brand new product features.
4.Help identifying new technology challenges in advanced process nodes and proactively provide the product improvement suggestion to R&D
5.Build up EDI expertise and deliver support to field team and customers whenever needed

Position Requirements:        
1.CS/EE BS degree with 5+ years or MS degree with 3+ years of EDA or IC design related experience.
2.Good experience with Place and Route design flow using EDA tools. Good knowledge of LEF/DEF.
3.Be familiar with IC back-end design flow, from netlist to gdsout.
4.Strong analysis/bedbug capability for technical issues, be detailed oriented with a focus on quality.
5.Good team player with strong written and verbal communication skills.
6.Be able to work under pressure, be able to work on multiple projects at the same time.
7.Good English read, write and communication Skill.