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[招聘] NO.86-Engineering Director (Hardware)(Shanghai)

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发表于 2013-5-17 15:40:00 | 显示全部楼层 |阅读模式

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Job Description:   
The successful candidate will be leading the SOC integration team, oversee development projects and participate in identifying new opportunities and improvements to the ASIC design process. Close interaction with all ASIC development groups (digital design, digital verification, physical design and analog design) is key, to understand and assess project risks.
The candidate has to be hands on, detail oriented and technology savvy. Participation to all department wide activities, from product planning to initiatives is expected. This is a high level, high exposure position, which requires driven individuals with a sense of achievement and closure.

Responsibilities:   
-         Manage day to day operations of the ASIC development team
-         Monitor progress on all activities and make adjustments as needed to keep development on track
-         Assess quality of work in progress and monitor risk levels
-         Participate in 3rd party IP (Soft IP, Hard IP or Analog IP) evaluation and acquisition
-         Participate in process and flow improvements
-         Interact with EDA vendor to determine development needs
-         Interact with foundry to tapeout the chip as well as technical and technology support
-         Interact with functional groups to get closure on various aspects of product development, from requirements lock down, to architecture definition, to implementation, to physical design leading to tape out
-         Work through all personnel issues, from motivation, to career planning, to potential conflict resolution

Candidate Qualifications:
-         A minimum of 10 years of experience in ASIC design, with a proven track record of multiple tape outs in 65nm and below. Exposure to 40nm and beyond is a plus
-         A minimum of 5+ years experience in managing large engineering teams
-         Proven track record of planning, tracking and completing complex projects
-         Capability to plan strategically, without losing sight of the tactical aspects
-         Strong working knowledge of all phases of ASIC development from Concept plan, Requirement, Architecture, Design Spec, RTL/Netlist handoff, Floorplan, Timing Closure, Physical Verification to GDSII
-         Strong working knowledge of HDL development flows and processes
-         Strong exposure to verification methodologies and coverage metrics
-         Exposure to various SOC architectures, including bus fabric, modem, multimedia
-         MS degree in Electrical Engineering

KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.
If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
“KT人才”微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!(关注成功后输入”KT“即可查询职位!)
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