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各位英雄好汉,我是上海Alllways的猎头顾问Zoey.
现有一知名美资半导体公司招聘SOC Validation工程师,主要做芯片tape out之后的板级功能性验证。地点天津。
各位英雄好汉如有兴趣,可发简历至我邮箱:zoey.guo@allways-consulting.com
详细要求如下:
Job Description: SoC Design ValidationEngineer Location:Tianjin
Job Tasks 1) Support post-silicon chipvalidation for multiple SoC products to ensure on-time high quality productdelivery to customers. 2) Be responsible for FPGA basedprototyping tasks for Microcontrollers group’s Kinetis L/E/K/V familiesproducts for early customer application engagement and design validation. 3) Participate on building up an enhancedpost-silicon validation flow with customer user mode driven and applicationawareness for early detection and correction of application related failuremodes, by collaborating with application support teams. 4) Initiate and implement a digital-analogmixed-signal FPGA H/W platform for early functional evaluation ofdigital-analog mixed-signal IPs and surrounding core/SoC interfaces, by workingCDC’s analog IP design team in TJN/SZO.
Qualifications: Must Have • BS Degree or above in EE/CE • 5+ years of experience in post-silicon SoC chip validation from taskplanning to completion into production; • A solid track record of digital logic module /chip validation and silicon debugexperiences supported by product ramp up in production and sold in good volume. • Practical knowledge and experience of pre-silicon FPGA digital logicprototyping and validation before design tape out. • English communication skills(writing, listening and speaking) good enough toeffectively interface with global design groups in US and China.
Desirable: • Practical knowledge of analog IP designs and methods of FPGA based digitalanalog mixed signal SoC chip prototyping and validation. • Knowledge and experience of user case driven application-centric test andvalidation; utilize SW as part of validation coverage. • Mature, confident, collaborative, and ready to learn; good inter-personalskills in working with engineers in SoC design and verification, analog IPdesign and test.
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