Resistor-Less Design of Power-Rail ESD Clamp Circuitin Nanoscale CMOSTechnology

semico_ljj

Resistor-Less Design of Power-Rail ESD Clamp Circuitin Nanoscale CMOSTechnology

Chih-Ting Yeh, StudentMember,IEEE, andMing-Dou Ker, Fellow, IEEE

Abstract—A resistor-less power-rail electrostatic discharge
(ESD) clamp circuit realized with only thin-gate-oxide devices
and with a silicon-controlled rectifier (SCR) as the main ESD
clamp device has been proposed and verified in a 65-nm CMOS
process. By skillfully utilizing the gate leakage current to realize
the equivalent resistor in the ESD-transient detection circuit, the
RC-based ESD detection mechanism can be achieved without
using an actual resistor to significantly reduce the layout area in
I/Ocells.Fromthemeasuredresults,thenewproposedpower-rail
ESD clamp circuit with an SCR width of 45 μm can achieve 5-kV
human-body-model and 400-V machine-model ESD levels under
the ESD stress event while consuming only a standby leakage
current of 1.43 nA at room temperature under the normal circuit
operating conditionwith1-Vbias.

Index Terms—Electrostatic discharge (ESD), gate leakage,
power-rail ESDclamp circuit, silicon-controlled rectifier (SCR).

mcm908911

下载看看。 。。谢谢楼主。。。正需要这个呢~CLAMP啊。。

瑜伽

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lyfztz

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muxl1

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david.yih

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QQben

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simufox

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seven77

thanks