[招聘]Synopsys内推职位前端设计应用工程师

xiapi321

Business Title：CAE, Sr I
Hiring Location(s)：CHINA - Shanghai
Job Description and Requirements：

Provide technical support to customer for integration of Synopsys' Mixed
Signal IP into ASICs.  This includes:

   - Debugging of customers' simulation or silicon issues
   - Reviewing customers' integration of our IP
   - Answering technical questions about our IPs' operation
   - Train field engineers in IP operation and demonstration.
   - Interface with the R&D Engineering teams to provide timely
   communication to and from customers.

Qualifications:
   - BS + 5 years of prior work-experience,  or MS + 2 years of prior work
   experience.
Must-Have Skills:
   - All front-end skills :  RTL design & verification in verilog,
    synthesis, static-timing analysis, DFT.
   - Scripting in Perl/TCL etc..
   - Programming in C/C++.
   - Time management skills to balance multiple high-priority tasks and
   projects.
   - Proficient in oral and written communication in English and Mandarin.
   - Willingness to learn new skills and perform tasks that often go
   outside of the area of current expertise.

Skills that will put you at an advantage:
   - Domain-knowledge : High-Speed serial communication standards like
   USB3.0. PCI-Express, SATA, XAUI, etc.., with full understanding of
   functional partitioning between protocol layers.
   - Back-end skills
   - Analog design/simulation, Matlab
   - Understanding of transmission-line fundamentals, and signal-integrity
   concepts.
待遇可以自己和HR谈，
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