1.
Digital Design Engineer-Shanghai
Job Description
- Candidates for this position should have experience in the design and design management of large, high-speed, mixed signal SoCs. The designs must have contained a variety of both hard and soft-macro IP blocks. The candidate should be an expert in all parts of the SoC flow from IP deliverable hand-offs (in RTL or gate), to synthesis, DFT and test insertion, floorplanning, P&R, timing closure, signal integrity, power analysis and verification. After at least 5 years of design experience the candidate should have 3 years of design management experience. MS or higher degree in EE is required.
Requirements/Qualifications (Education)
- MSEE or higher degree in EE required.
2.
Digital Design Engineer
Job Description
- Working with an Architecture/Algorithm Development Team to finalize system architecture
- for optimal implementation of digital signal processing algorithms, including architectural
- Definition and tradeoffs, die size, power estimation.
Requirements/Qualifications (Education)
- Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification,formal verification and static timing analysis. Unix shell, Perl scripting, C/RTL co-simulation.
- Sound theory background of communication and Digital signal processing
3.
Serdes
ASIC Design Engineer
(New!!!)
Job Description
- Looking for a candidate who is familiar with digital IC design methodologies, understands all stages of ASIC design flows, and is experienced with state-of-the-art design tools. The candidate has solid knowledge of timing closure and synthesis flow and is experienced in logic design and verification.
- Minimum requirements:* Knowledge of HDL and experience in behavioral and RTL coding, Verilog preferred
- Knowledge of logic synthesis and timing analysis.* DSP and communications background is a plus
Requirements/Qualifications (Education)
- B.S. required, MS/Ph.D. a plus. At least 3 years of experience.
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发表于 2012-4-16 16:52:15
