AMD（超威半导体）3月最新社招职位信息

amd_cdc

AMD（超威半导体）2013年5月最新出来的职位空缺，大家有兴趣的可关注下。
主要集中在验证、设计、后端、软件方向。工作地点在上海张江集电港。

员工内部推荐，我可以告诉你面试的一些事项，这样面试成功的几率会大很多。
有意的朋友可发简历至我邮箱：
amd_cdc@126.com



另外，还有很多别的职位，以及北京研发中心、苏州公司的相关职位，感兴趣的朋友可以给我发个邮件或者投个条，
会尽快回复。

1, Senoir(Staff) DV Engineer

DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION :

We are currently looking for an Senior Eng Design Verification Engineer who will be

responsible for all aspects of verification on next generation integrated processors chipset,

including developing DV infrastructure environment, testbenches, modeling,

assertions/checkers/monitors, test plan & test development, regressions, and

infrastructure development. Responsibility includes participating in the pre-silicon blocks,

chip, multi-chip and system level verification strategy:

- Verification of Graphic North Bridge design using complex DV environment C/C++,

SystemVeilog, OVM, SystemC, verilog - Infrastructure development

- Experience in use of front end CAD tools Synopsys (VCS, )

- Strong documentation and communication skills.

- Ability to work well in a dynamic, fast-paced, pressure filled, multiple sites North

America and Asia

- Flexible in terms of responsibilities and hours.

PREFERRED EXPERIENCE:

- Bachelor/Master in Electrical/Computer Engineering.

- Strong C and C++ software development and scripting languages (Perl, C Shell,

Makefile, …) experience.

- Good knowledge of SystemVerilog and OVM is desirable.

- 3+ years experience in Verification in a large scale asic design environment.

- Strong background with hardware verification methodologies such as coverage-based

verification methodology with the use of hardware assertions (PSL or SVA).

- Strong analytical thinking skills, excellent attention to detail, and good coding skills

are required.

- Must be organized, enthusiastic self-starter and have good communication skills and

the ability and desire to work as a team.

2, Senoir(Staff) Design Engineer

DESCRIPTION OF DUTIES:
The candidate will be working in the areas of verification infrastructure development and support. Also responsible for EDA tools and in-house verification tools/flow development and support. This position requires the candidate to work closely with the verification teams on simulation debugging and verification environment support. The potential candidate is expected to work with multiple sites infra teams to get the job done.

PREFERRED EXPERIENCE:
• Bachelor/Master Degree in Electrical or Computer Engineering.
• Proven ASIC / SoC Design Verification / CAD / DAE Experience (5+ years as a bachelor, 3+ years as a master).
• Advanced C/C++/SystemVerilog, RTL coding techniques.
• Well experienced in Unix shell and script programming like Perl.
• Design for verification (assertion based design strategies, code coverage, functional coverage,
test plan, gate-level simulation, back-annotation etc.)
• Strong verbal and written communication skills in english.
• Strong problem solving skills.
• Self-start and can get job done with a minimum supervisor.
• Ability to be flexible in terms of responsibilities and hours

3,Stafff GPU Firmware Development Engineer

KEY RESPONSIBILITIES

GPU firmware program development for AMD best in class GPU products Participate in APU/GPU silicon bring up Identify and help resolve ASIC, board and firmware issues, provide diagnostics support to external customers and internal engineering teams Provide technical guidance to junior engineers Responsible for execution of programs, multiple projects on the go
• Forward thinker to improve development process and drive innovation

REQUIREMENTS

B.Sc. or M.Sc. In EE or CS or equivalent is required Good English required – verbal and written
• Mandarin

EXPERIENCE AND SKILLS

A minimum of 6+ years experience on driver or embedded SW development and closely interact with HW designers (8+ years as a bachelor, 6+ years as a master) Hands on firmware or hardware driver development experience in an ASIC company is preferred Strong mix of large-scale software development ability and hardware understanding Proficient in C/C++ programming Familiar with Linux, Embedded System. Linux Kernel/Driver development
Familiar with Video (MPEG2, DVB, MPEG4, H.264 etc) Familiar with Graphic (TV, graphic driver etc) Hands-on experience with any one of display interface, PCI-E, and GDDR memories is preferred. Hands-on experience with 3D graphics is highly desired
• Strong experience with board bring up is essential

4，Sect. Manager（Senior /Staff ） of Physical Design

DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
Lead a small team of physical engineers to work with global Front-End design team and physical design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level (full chip) floor planning, timing closure, place&route, physical verification etc. The individual is expected to be an expert in at least one PD area and provide technically leadership to the engineering team.

JOB REQUIREMENT:

1.MSEE with 5+ years or Bachelor with 8+ years of industrial experience in ASIC design

2. 3+ years or more years of experience in physical design of deep submicron digital ASIC chips

3.Hands on experience in large scale ASIC chip physical design

4.Knowledgeable in all aspects of deep submicron ASIC design flow

5.Successfully gone through several complete product development cycles

6.Demonstrate leadership and work well with cross-functional teams

7.Good listening, writing and speaking English

8.Good communication skills, strong interpersonal skills and the flexibility

9.Dedicated, hard working and good team player

10.Familiar with Back-End (physical design) EDA tools

11.Familiar with Front-End EDA tools is a plus

12.Familiar with Unix/Linux environment and good at scripts

5. （staff) Graphic Board Design

KEY RESPONSIBILITIES
- Board development
n Design reference boards for GPU bring-up and board products for retail and OEM markets
n Understand performance and cost comparative trade-offs at the board and system level
n Optimize power distribution to meet requirements and design cost-performance efficient power supplies including integrated, linear, LDO and SMPS topologies
n Research and evaluate components, simulate circuits, capture schematic and generate BOMs
n Guide and review PCB layout for signal integrity, EMI and DFM with minimum layer-count and PCB real-estate
n Board bring-up, troubleshoot and fine-tune for an optimum balance of cost and performance
- Cross-Functional system-level development
n Work with thermal-mechanical team to overcome component, board or system thermal challenges
n Develop qual plan, sign-off hardware qualification results and strive to meet compliance requirements
n Work with BIOS/software and cross-function engineering teams to ensure optimum register programming for performance, features, thermal, SI, EMI or to resolve system issues
n Support production and resolve post-production technical issues
- Product sustain and post-production cost reduction redesign
n Sustain post-production products and replace or qualify alternate components
n Redesign of matured products for improved feature, performance, and cost trade-offs

REQUIREMENTS
- BASc. or MASc in Electrical engineering or equivalent
- 8+ years of board hardware design experience with strong Analog/digital electronic background
- Design experience in power supplies and DC-DC SMPS
- Understand high-speed mix-signal multi-layer PCB design techniques
- Understand cost-reduction design trade-offs in volume production
- Experienced working relationship with broad range of global and local microelectronic component vendors
- Understand industrial standards: bus specifications (PCIe PCI, AGP), G/DDRx, I2C, high-speed/digital interfaces (TMDS, HDMI, DVI and VESA), and video standards (Composite, S-Video and Component Video)
- Knowledge of PC, cpu and graphics architectures
- Proven ability to effectively handle fast-pace projects from specification through to production
- Must be a self-motivated contributor and a strong team player
- Effective communication skills (both written and spoken) in English and Mandarin

6. Software Engineer

AMD Applications team provides the platform configuration and control user experience for AMD platforms and components.

Essential Functions

The candidate must demonstrate flexibility, strong motivation and a proven record of working in a fast paced software development environment as well as the ability to work as part of a team. The individual must have proven abilities to solve critical software problems, and will be working with innovative managers and engineers to provide solutions and services for AMD’s platform configuration/control and over-clocking software products. This role will include development, debug, and optimization of software solutions on Windows platforms. Software deliverables will be integrated into complete product solutions. Therefore code quality, robustness, extendibility and performance are critical. As a senior member of the team, you will also be responsible for code reviews, creating unit tests, authoring high level and detailed design documentation related to your work, and working with on-site and off-site teams to deliver the software solution on schedule. You will also participate in all phases of the software development including system requirement analysis and coordinating new feature design and development with other departments.

Education and Experience

·BS or MS Computer Science, Computer Engineering or Electrical Engineering required.

·Bachelor degree with 6+ years or Master with 4+ years of commercial software development experience required.

·Windows platform knowledge including 32- and 64-bit APIs required.

·Experience with C/C++ and C#/.NET required, Knowledge of WPF, WTL, QT, and Windows Kernel Mode drivers preferred.

·Strong analysis and problem solving skills required.

·Proven interpersonal skill, technical leadership and teamwork required.

·Solid knowledge of the software development lifecycle and OO design required.

·Must be fluent in both written and spoken English.

·Knowledge of PC platforms and over-clocking preferred.

·Kernel mode software development experience preferred.

·Experienced project planning and prior technical leadership responsibilities preferred.

·Experience working with multi-site teams preferred.

Key Responsibilities

·Design and develop end-user, platform configuration and control applications for Windows based PCs

·Collaborate with local and remote development and test teams to deliver a complete application

·Communicate with internal/external stakeholders to understand and define the software requirements.

·Investigate project roadmaps and product technical documentation to understand software impact. Translate these requirements/impacts into executable task plans.

·Write development documentation and contribute content to end user documentation.

·Software development, unit and integration test, debugging, post release support and software configuration management.

·Accountable on time delivery of deliverables.

·Interface with management and off-site teams to co-develop the complete product solution.

Regular communication via Audio/Video conference with teams in North America.



7. Senior ASIC CAD Engineer

Job Description:

·Participate in the design and implementation of the leading edge, front-to-back ASIC design flow which covers logical and physical implementation and analysis of complex devices that integrate multiple cores and IP’s from organizations with AMD global teams.

·Participate in the research of Design Methodology to improve automation and
productivity to produce AMD's new high-quality cutting-edge products

·Technical support and programming

·Interface with EDA venders on technology

Preferred Experience:

·major in EE, CS or related, Master Degree with 5+ years or Bachelor with 7+ years working experiences

·good programming skill with one or more languages (e.g. tcl, perl , python, c/c++, etc) in unix/linux and a strong desire to automate flow

·experience in ASIC design (digital design, Front-end or Back-end)

·Be good at Static timing analysis ( related EDA tool is Primetime, used by both Front-end and Back-end design team)

·familiar with one or more ASIC flows (logic synthesis, STA, formality check, Design for Power (UPF/CPF) ) and usage of related EDA tools

·Good written and spoken English

·Good communication skills and be able to work both independently and in a team

8.MTS or Sr. Linux SB Driver Developer

DESCRIPTION OF DUTIES:- Design, code and maintain AMD Linux south bridge drivers - Provide technical leadership in the development of new features- Improve customer satisfaction and product quality by fixing problems- Accountable on time delivery of deliverables- Closely interact with ASIC design team in new feature definition and bring up for future product generation- Collaborate with local and remote development and test teams to deliver a complete product solution- Interface with management and off-site teams to co-develop the complete product solution- Regular communication via Audio/Video conference with teams in North America PREFERRED EXPERIENCE:- MTS candidate: BS-CS/BS-EE with at least 7 years experience in Linux driver development, or 5 years experience for master degree- Sr. engineer candidate: BS-CS/BS-EE with at least 5 years experience in Linux driver development, or 3 years experience for master degree- Extensive hands-on experience and demonstrated technical expertise in Linux driver and kernel debug - Excellent and demonstrable C/C++ programming skills- Experience in development of south bridge device drivers is a plus - Strong analysis and problem solving skills required- Proven interpersonal skill, technical leadership and teamwork required- Must be fluent in both written and spoken English- Strong English language skills in reading and writing- Experienced project planning and prior technical leadership responsibilities preferred- Experience working with multi-site teams preferred

X6J6P6

回复 1# amd_cdc
LZ，有北京数字后端的职位吗，具体什么要去啊？谢谢。

amd_cdc

回复  amd_cdc
LZ，有北京数字后端的职位吗，具体什么要去啊？谢谢。
X6J6P6 发表于 2012-3-10 00:29

                               
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你好，这是北京数字后端的职位描述和要求
感兴趣的话把简历发给我啊
   

JOB TITLE:
Sr. Physical Design Engineer

DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION:
Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level (full chip) floor planning, timing closure, place&route, physical verification etc.


PREFERRED EXPERIENCE:
1. MSEE with 3+ years or Bachelor with 5+ years of industrial experience in ASIC design
2. Expertise in place and routing, signal integrity, power analysis, CTS design, DFT, design rule and connectivity verification, timing closure.
3. Successfully gone through complete product development cycle. Good analytical and debugging skills
4. Good listening, writing and speaking English.
5. Good communication skills, strong interpersonal skills and the flexibility. Dedicated, hard working and good team player
6. Familiar with Back-End (physical design) EDA tools (synopsys,cadence,magma)
7. Familiar with Front-End EDA tools or circuit design is a plus
8. Familiar with Unix/Linux environment and good at scripts

amd_cdc

回复 3# amd_cdc


    各位朋友抓住机会噢

zhuyujun

楼主需要layout不？什么要求呢？

200602305121

楼主，数字后端要应届生吗？我是今年毕业的应届硕士

js_shen

苏州的英语不行，可以吗

amd_cdc

回复 6# 200602305121


    这次招聘暂不面向应届生

amd_cdc

回复 7# js_shen


    至少书面的英文邮件要会写啊，呵呵

amd_cdc

楼主需要layout不？什么要求呢？
zhuyujun 发表于 2012-3-12 14:56

                               
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    有后端PR的职位啊，要求有相关的工作经验