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Design Techniques for Low-Voltage High-Speed Digital Bipolar Circuits
by
Behzad Razavi, Member, IEEE, Yusuke Ota, and Robert G. Swartz, Fellow, IEEE
Abstract—This paper describes design techniques for multigigahertz
digital bipolar circuits with supply voltages as low as
1.5 V. Examples include a 2/1 multiplexer operating at 1 Gb/s
with 1.2 mW power dissipation, a D-1atch achieving a maximum
speed of 2.2 GHz while dissipating 1.4 mW, two exclusive-OR
gates with a delay less than 200 ps and power dissipation of 1.3
mW, and a bufferflevel shifter having a delay of 165 ps while
dissipating 1.4 mW. The prototypes have been fabricated in a
1.5-um 12-GHz bipolar technology. Simulations on benchmarks
such as frequency dividers and line drivers indicate that, for a
1.5-V supply, the proposed circuits achieve higher speed than
their CMOS counterparts designed in a 0.5-um CMOS m-ocess
with zero threshold voltage |
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发表于 2006-11-22 15:29:10
谢谢楼主啦！
