Design and Modeling of PLL Based CDR for Inter Chip Communications

xhseu · 发表于 2011-12-11 21:22:19

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Design and Modeling of PLL Based CDR for Inter Chip Communications http://www.amazon.com/Design-Modeling-Based-Communications-Verilog/dp/3639185544 谁有这本书？谢谢

过路心客 · 发表于 2011-12-12 19:43:27

这是篇论文。国外写得好的论文，也可以找出版社直接出版。

abbr_df29135f9d47a5983f9de9169d6f41c1.pdf (8.57 MB, 下载次数: 2450 )

过路心客 · 发表于 2011-12-12 19:44:48

文件名为什么会变成乱的？
Design and Modelling of Clock and Data Recovery Integrated Circuit in 130nm CMOS Technology for 10Gbs Serial Data Communications [Assaad 2009].pdf

fixit · 发表于 2011-12-12 20:37:48

thanks

Jason.tschen · 发表于 2011-12-16 08:43:39

very well
I am very appreciated with your post , thanks buddy

sunjimmy · 发表于 2011-12-16 10:25:09

Thanks for sharing the PhD thesis.
Good job !

harry1862pd · 发表于 2011-12-22 19:24:21

Thanks for sharing the PhD thesis.
Good job !

qchunh · 发表于 2012-1-4 22:55:34

xiexie

leonken460 · 发表于 2012-1-5 10:07:26

thanks a loot

aak · 发表于 2012-8-28 13:57:50

感謝提供分享, 下來參考看看

[求助] Design and Modeling of PLL Based CDR for Inter Chip Communications

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