2010-Layout Optimization on ESD Diodes for Giga-Hz RF

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz
RF and High-Speed I/O Circuits

Chih-Ting Yeh1,2, Yung-Chih Liang1, and Ming-Dou Ker2,3
1 Circuit Design Department, Design Automation Technology Division,
Information and Communications Research Laboratories, Industrial Technology Research Institute, Hsinchu, Taiwan.
2 Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan.
3 Department of Electronic Engineering, I-Shou University, Kaohsiung, Taiwan.

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-chip ESD protection device at
GHz RF and high-speed I/O pads due to the small parasitic
loading effect and high ESD robustness in CMOS integrated
circuits (ICs). This work presents new ESD protection diodes
realized in the octagon, waffle-hollow, and octagon-hollow layout
styles to improve the efficiency of ESD current distribution and
to reduce the parasitic capacitance. The new ESD protection
diodes can achieve smaller parasitic capacitance under the same
ESD robustness level as compared to the waffle diode. Therefore,
the signal degradation of GHz RF and high-speed transmission
can be reduced due to smaller parasitic capacitance from the new
proposed diodes.

semico_ljj

best...

mtwumtwu

good reference for ESD layout

yhkim661230

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tingyc

谢谢！谢谢！

rfid_sh

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geneicz

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ccq0302

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xuleiwx

是一篇论文。

pyhpsh

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