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High-Speed Signaling: Jitter Modeling, Analysis, and Budgeting (Prentice Hall Modern Semiconductor Design Series) [Hardcover]
Kyung Suk (Dan) Oh (Author), Xing Chao (Chuck) Yuan (Author)
Publisher: Prentice Hall
Copyright: 2012
Format: Cloth; 528 pp
Status: Not Yet Published
Estimated Availability: 10/05/2011
Product DescriptionNew System-Level Techniques for Optimizing Signal/Power Integrity in High-Speed Interfaces—from Pioneering Innovators at Rambus, Intel, IBM, MIT, and Berkeley
As data communication rates accelerate well into the multi-gigahertz range, ensuring signal integrity both on- and off-chip has become crucial. Signal integrity can no longer be addressed solely through improvements in package or board-level design: Diverse engineering teams must work together closely from the earliest design stages to identify the best system-level solutions. In High-Speed Signaling, several of the field’s most respected practitioners and researchers introduce cutting-edge modeling, simulation, and optimization techniques for meeting this challenge.
Edited by pioneering experts Dan Oh and Chuck Yuan, these contributors explain why noise and jitter are no longer separable, demonstrate how to model their increasingly complex interactions, and thoroughly introduce a new simulation methodology for predicting link-level performance with unprecedented accuracy. The authors address signal integrity from architecture through high-volume production, thoroughly discussing design, implementation, and verification. Coverage includes - New advances in passive-channel modeling, power-supply noise and jitter modeling, and system margin prediction
- Methodologies for balancing system voltage and timing budgets to improve system robustness in high-volume manufacturing
- Practical, stable formulae for converting key network parameters
- Improved solutions for difficult problems in the broadband modeling of interconnects
- Equalization techniques for optimizing channel performance
- Important new insights into the relationships between jitter and clocking topologies
- New on-chip measurement techniques for in-situ link performance testing
- Trends and future directions in signal integrity engineering
High-Speed Signaling thoroughly introduces new techniques pioneered at Rambus, Intel, IBM, MIT, and Berkeley: approaches that have never before been presented with this much practical detail. It will be invaluable to everyone concerned with signal integrity, including signal and power integrity engineers, high-speed I/O circuit designers, and system-level board design engineers.
About the AuthorKyung Suk (Dan) Oh is Senior Principal Engineer at Rambus's Semiconductor Business Unit, responsible for signal integrity, power integrity analysis, and link budget analysis for mobile products. An IEEE senior member, he has twelve patents and applications, and has published 70+ papers. Xingchao (Chuck) Yuan is engineering director in charge of a Rambus silicon team designing next generation graphics and main memory interfaces. His team is now researching graphics memory architecture to provide multi-terabytes of bandwidth without significant power consumption increases. His team's work led to the Rambus XDR memory architecture adopted in Sony's PlayStation 3.
Table of Contents
Preface
Chapter 1: Introduction
Chapter 2: High-Speed Signaling Basics
Part I: Channel Modeling and Design
Chapter 3: Channel Modeling and Design Methodology
Chapter 4: Network Parameters
Chapter 5: Transmission Lines
Part II: Analyzing Link Performance
Chapter 6: Channel Voltage and Timing Budget
Chapter 7: Manufacturing Variation Modeling
Chapter 8: Link BER Modeling and Simulation
Chapter 9: Fast Time-Domain Channel Simulation Techniques
Chapter 10: Clock Models in Link BER Analysis
Part III: Supply Noise and Jitter
Chapter 11: Overview of Power Integrity Engineering
Chapter 12: SSN Modeling and Simulation
Chapter 13: SSN Reduction Codes and Signaling
Chapter 14: Supply Noise and Jitter Characterization
Chapter 15: Substrate Noise Induced Jitter
Chapter 16: On-Chip Link Measurement Techniques
Chapter 17: Signal Conditioning
Chapter 18: Applications
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