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LSI上海研发中心正在扩张，目前有很多职业发展机会，欢迎有志之士加入！有意者，请将简历发至：Tracey.zheng@lsi.com 如有任何疑问，请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709. 也可加我msn: zql975504@hotmail.com LSI上海研发中心位于徐汇区中山南二路徐汇苑大厦（8万人体育场对面） 1.
Sr. Verification Engineer –Shanghai Job Responsibilities Duties will include working with a Verification Team to develop reusable block and system level verification environment using high level verification language to support ASIC development. Review RTL architectural and implementation specifications. Develop test plan, create stimulus drivers, monitors, reference models, scoreboards, protocol checkers to verify function and performance of advanced multiprotocol networking ASICs. Define and develop application tests required to verify ASICs meet functional and performance goals. Define and implement functional coverage plans. Define and implement code coverage plans. Develop testing and regression methodologies for new verification flow. Coordinate test plan implementation and regressions with remote team. Incorporate reusability into all aspects of the verification environment. Develop/maintain/enhance environment tools/scripts/makefiles. LSI Corporation is a leading provider of innovative silicon, systems and software technologies that enable products which seamlessly bring people, information and digital content together. We offer a broad portfolio of capabilities and services including custom and standard product ICs, adapters, systems and software that are trusted by the world's best known brands to power leading solutions in the storage and networking markets. We value the diversity of our people. LSI is an Equal Opportunity Employer. Functional/Industry Knowledge:
Required: - ASIC Design and Verification skills and experience - Knowledge of high level verification languages such as SystemVerilog - Knowledge of data and telecommunication networking - Scripting skills, such as Shell, Perl and TCL - Good written and verbal communication skills Education/Certifications: Required Degree: MS Preferred Major: Electrical Engineering or related discipline
2.
Read Channel Verification Engineer-Shanghai JOB DESCRIPTION: As a member of the Read Channel team, candidate must be willing to work as an extended member of the design team. Duties will include functional verification of Storage read channel mixed-signal IP. Candidate will be expected to contribute to design and development of System Verilog based verification environment and will be responsible for verification closure of block/chip/system level functions for mixed signal based IP. Experience with System Verilog and functional coverage methodologies are required. Must be willing to follow a disciplined verification methodology and to work closely with a multi-location, international design team. Excellent teamwork and communication skills are required. PREFERRED EXPERIENCE: BSEE with 3-5+ years of design and/or verification experience required, MSEE preferred. Required knowledge and skills: - Expertise in System Verilog required - Good understanding of Digital Signal Processing - Good understanding of Analog and Digital Circuits - Very good analytical/debugging skill - Good verbal and written communication skills Desirable skills: - Knowledge of Verilog-AMS, Perl - Knowledge of verification methodologies including functional coverage and constrained random testing - Knowledge of VLSI design flows & DFT - Familiarity of high level programming language - Experience working with globally distributed team management - Experience in Supervising and mentoring Validation engine 3.
Design Validation Engineer JOB DESCRIPTION: -
This position is part of the LSI’s world-leading head-to-host recording system design validation team, and focus on high speed pre-amplifier validation and debug. -
Set up bench test equipment and perform characterization measurements on high speed(>4GHz) mixed signal IC's, paying careful attention to measurement accuracy and repeatability and test condition coverage -
Design and layout evaluation PCBs, paying careful attention to high speed signals and board component parasitic -
Develop automated scripts and program test equipment to automate data collection and report generation. Where automated measurements are not practical, manual data collection is to be performed -
Work with design and other characterization teams in design verification and characterization and errata corrective action, as well as work with program management, test and product engineering to insure timely delivery of fully verified silicon -
Support bench application engineers with in-depth customer specific measurements and failure analysis -
Organize bench data into technical reports for reference and presentation. Presentation of data to both internal and external customers -
Manage local subcontractors that perform flip chip and board assembly. Work with program management, design, test and product engineering as part of a product support team to insure timely delivery of fully validated silicon. PREFERRED EXPERIENCE: -
Investigative and analytical mindset, with a strong interest in electronics and technical work -
A thorough knowledge of electronic circuits and systems with practical experience in analog and digital electronic circuit design and debug -
Experience or background with one of the following areas is preferred a)
Experiences in RF, high-speed connector(SATA, DDR etc), gesture recognition or storage system(HDD, Flash etc) measurement b)
Experiences in Cadence Allegro HDL(Concept) PCB development. Allegro layout experience is a plus c)
Developing the automation programming: VBS, Labview & TestStand. IVI driver coding experience is a strong plus d)
Complete the FPGA design with 200MHz+ data paths before -
Expertise in applied magnetism and recording a strong plus -
Good communication skills, especially in technical writing and reporting 4.
ASIC Customer Engineer-Shanghai Job Description - LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs. Requirements/Qualifications (Education) Education: BS/MS Electrical, Computer Engineering or Equivalent - Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply: - RTL Analysis/Synthesis/STA: The ideal candidate should have strong skills for the front-end of design - implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC - environments. This would include strategies for power management. - OR Physical Design Implementation: The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus. - Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus. - OR - Physical Verification: The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus. - OR - DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes
5.
Test Engineer-Shanghai JOB DESCRIPTION: - To support prototype and production releases of new products. Manage debug of test program and hardware and meet product release schedules. - Support test program development for implementing changes in new test methodologies for test coverage improvement. - Pursue Design for Test initiatives to optimize testability and achieve test cost reduction via test time reduction and multiple site test solutions for production release. - Support test chip test development and characterization of new IP used in LSI products. PREFERRED EXPERIENCE: - University graduate students with top scores in GPA - Prior working experiences in the semiconductor industry field, specially in either IDM, Fabless, or Foundry environment - ATE programming skills would be essential - C++ and/or Perl programming skills Prefer candidate with analog mixed signal test background 6.
Preamp Analog Mixed Signal Design Engineer Job Description - Design high speed analog and mixed-signal integrated circuits within custom chips for the hard disk drive and tape drive industry - Work directly with customers to determine system requirements, write specifications and guide customers in the use of pre-amplifier products - Use high speed electronic characterization equipment to evaluate and debug the functionality of the design once the part is fabricated in silicon - Provide technical leadership through all phases of product development including test, yield, characterization, reliability analysis, qualification and release to manufacturing Requirements/Qualifications (Education) - Minimum three years experience in discrete, transistor level analog circuit design - Experience with analog and mixed signal IC product design, integration and verification is require - Strong physical layout knowledge and parasitic component understanding essential - Process and device physics knowledge critical - Proven skills using electronic measurement equipment in a lab environment - Expertise in applied magnetism and recording a strong plus 7.
Field Application Engineering (FAE) Job description - Work closely with Sales and customers to provide excellent support for ASIC business.
- Achieve design wins at customers
- Support customers on-site when needed.
- Work closely with global technical colleagues (USA, China) to provide backup support.
- Track issues and defects and drive to resolution.
- Provide quick response to key customer’s request on technical support.
- Provide technical training to Sales team and customers.
Requirements - 4 years+ of experience with ASIC design/customer silicon solution technical support/ASIC FAE support.
- Experience in IP foundation/Serdes, DDR etc I/O Memory interface application/Design implementation and development
- Familiar with Foundation IP/Serial connectivity protocol is a plus
- Demonstrated ability to learn technology quickly
- Very good English communication skills
- Team player, self-motivation
- Communication/Information Systems/Microelectronics or EE degree, Masters preferred
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发表于 2011-9-9 16:07:27
