|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
本帖最后由 hi_china59 于 2011-9-9 17:12 编辑
Noise Improvement of Low Frequency and Low Power Dissipation Rail-To-Rail Differential Input Operational Amplifier IC Design
摘要: 在本篇论文中,利用TSMC 硅锗0.35微米制程技术来设计应用于低频操作的放大器,并且利用H-SPICE软件对其进行仿真分析,此电路称之为「低频低功率轨对轨差动运算放大器之噪声改善集成电路设计」。噪声改善的方式是使用BiCMOS做为输入级差动对的电路结构,以取代CMOS输入级差动对的电路结构,然后透过设计出使用这两种不同输入级的运算放大器,并对其进行模拟分析与比较而得到本论文之研究结果。最后将其接成仪器放大器的电路架构,并再次进行模拟分析与比较而证实所设计出的运算放大器应用于仪器放大器上 亦能有改善噪声的效果。另外,本论文内有提及所设计的电路可应用于医疗电子方面的心电图(ECG)仪器上,并对ECG认识进行简单之介绍。
In this work, TSMC SiGe0.35μm technology is used to design a low noise analog integrated circuit. This work is called 「Noise Improvement of Low-frequency , Low-power Rail-To-Rail Differential Input Op-Amp」, and is simulated by H-SPICE. It uses BiCMOS technology replacing CMOS technology in the differential input stage to improve noise in Op-Amp circuits. Through simulation and comparison, the results show that noise in the BiCMOS rail-to-rail differential input Op-Amp is better than noise in CMOS rail-to-rail differential input Op-Amp. Finally, rail-to-rail instrumentation Amps are integrated by these two kinds of Op-Amp, and then they are simulated and compared again. The simulation and comparison results show that noise is significantly improved when using BiCMOS rail-to-rail differential input Op-Amps. In addition, this paper mentions the designed rail-to-rail instrumentation Amps could be applied as ECG Amplifier in the medical electronic. This paper also introduces what is ECG and ECG related electronics.
论文目次
Table of Content: 摘要 ……………………………………………………………………Ⅰ
目录 ……………………………………………………………………IV
第一章 绪论 ………………………………………………………1
1.1 研究动机与相关背景 ………………………………………1
1.2论文简介 ……………………………………………………………4
第二章 基本原理与概论 …………………………………………5
2.1 心电图(ECG)简介 …………………………………………………5
2.1.1心脏的传导系统 ………………………………………………5
2.2.2心电图波形与相关参数 ………………………………………6
2.1.3 ECG前级放大器需求规格 ……………………………………9
2.2 噪声 ………………………………………………………………10
2.2.1信道热噪声 …………………………………………………11
2.2.2闪烁噪声 ……………………………………………………14
2.2.3转折频率 ……………………………………………………16
2.3 不匹配现象 ………………………………………………………17
第三章 轨对轨差动运算放大器架构设计与模拟分析 …………22
3.1 简介 ………………………………………………………………22
3.2 互补式-轨对轨差动运算放大器 …………………………………22
3.2.1电路架构 ……………………………………………………22
3.2.2模拟结果 ……………………………………………………33
3.3 BJT输入对-轨对轨差动运算放大器 ……………………………38
3.3.1电路架构 ……………………………………………………38
3.3.2模拟结果 ……………………………………………………43
3.4全N-channel输入对-轨对轨差动运算放大器 ……………………48
3.4.1电路架构 ……………………………………………………48
3.4.2模拟结果 ……………………………………………………51
3.5电流源与电压源电路 ………………………………………………56
3.5.1与温度无关之电流源 ………………………………………56
3.5.2带差参考电压源 ……………………………………………58
3.5.3 Vctrl偏压电路………………………………………………60
第四章 仪器放大器电路仿真分析与讨论 ………………………62
4.1 简介 ………………………………………………………………62
4.2轨对轨差动运算放大器的噪声特性比较 …………………………62
4.3仪器放大器基本原理 ………………………………………………64
4.3.1 仪器放大器与一般运算放大器之差别 …………………64
4.3.2 电路结构与分析 ……………………………………………65
4.4仪器放大器电路仿真架构与仿真结果 ……………………………69
4.4.1 模拟架构 ……………………………………………………69
4.4.2 模拟结果 ……………………………………………………75
4.5电路仿真结果的讨论与比较 ………………………………………88
第五章 结论………………………………………………………92
参考文献 ………………………………………………………………93
参考文献
Reference: [1]E. Allen and Douglas R. Holberg,“CMOS Analog Circuit Design”,Second Edition,OXFORD UNIVERSITY PRESS,2002.
[2]Razavi,“Design of Analog CMOS Integrated Circuits”,Mc Graw Hill,2002.
[3]Johan H. Huijsing,“OPERATIONAL AMPLIFIERS Theory and Design”,KLUWER ACADEMIC PUBLISHERS,2001.
[4]Murugavel Raju,“Heart-Rate and EKG Monitor Using the MSP430FG439”,TEXAS INSTRUMENTS Application Report,Publications Number SLAA28A-October 2005-Revised Sep. 2007.
[5]Xiyao Zhang,“A Design of ECG Amplifier,ECE 525 Project#1”,Sep. 2003.
[6]DailyCare BioMedical Inc,“http ://www.dcbiomed.com/material/ECG3CH.pdf”.
[7]W. Timothy Holman and J. Alvin Connelly,“A Compact Low Noise Operational Amplifier for a 1.2 pm Digital CMOS Technology”,IEEE Journal of Solid State Circuits,VOL.30,NO. 6,June 1995.
[8]JEAN-CLAUDE BERTAILS,“Low-Frequency Noise Considerations for MOS Amplifiers Design”,IEEE Journal of Solid State Circuits,VOL. SC-14,NO. 4,pp.773-776,Aug. 1979.
[9]Peter R.Kinget,“Device Mismatch and Tradeoffs in the Design of Analog Circuits”,IEEE Journal of Solid State Circuits,VOL. 40,NO. 6,June 2005.
[10]Patrick G.Drennan,“Device Mismatch in Bicmos Technologies”,IEEE BCTM 6.1,2002.
[11]Yung-Chih Liang,Meng-Lieh Sheu,Wei Hung Hsu,“A RAIL-TO-RAIL,CONSTANT GAIN CMOS OP-AMP”,The 2004 IEEE Asia-pacific on Circuits and Systems,Dec. 6-9,2004.
[12]Vijay Rentala,Saroj Rout,Edward Lee and Robert J. Weber,“A CONSTANT RAIL-TO-RAIL OPAMP WITH A NOVEL INPUT STAGE FOR BICMOS PROCESS”,IEEE,(I-224)-(I-227),2001.
[13]Minsheng Wang,Terry L. Mayhugh,Jr.,Sherif H. K. Embabi,and Edgar Sanchez-Sinencio,“Constant- Rail-to-Rail CMOS OP-AMP Input Stage with Overlapped Transition Regions”, IEEE Journal of Solid State Circuits,VOL. 34,NO. 2,Feb. 1999.
[14]R.Hogervorst et.al.,“A Compact Power-Efficient 3V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries”,IEEE Journal of Solid State Circuits,SC-29(12):1505-1513,Dec. 1994.
[15]Juan M.Carrillo,Jose L.Ausim,J. Francisco Duque-Carrillo and Guido Torelli,“Constant- Constant-Slew Rate High-Bandwith Low-Voltage Rail-to-Rail CMOS
Input Stage for VLSI Cell Libraries”,IEEE Journal of Solid State Circuits,VOL. 38,pp.1364-1372 ,Aug. 2003.
[16]J. Ramirez-Angulo,R. G. Carvajal,J. Tombs and A.Torralba,“Low-Voltage CMOS Op-Amp with Rail-to-Rail Input and Output Signal Swing for Continuous-Time Signal Processing Using Multiple-Input Floating-Gate Transistors”,IEEE Trans. Circuits Syst. Ⅱ,VOL. 48,pp.111-116,Jan. 2001.
[17]Timothy Wayne Fischer,Aydm Ilker Karsilayan and Edgar Sanchez-Sinencio,“A Rail-to-Rail Amplifier Input Stage With ± 0.35% Fluctuation”,IEEE Trans.Circuits Syst. Ⅰ,VOL. 52,pp.271-282,Feb. 2005.
[18]Vadim Ivanov and Shilong Zhang,“250 MHz CMOS rail-to-rail IO OpAmp: Structural Design Approach”,European Solid State Circuits Conference,pp.183-186,2002.
[19]Franco Fiori and Paolo Stefano Crovetti,“A New Compact Temperature –Compensated CMOS Current Reference”,IEEE TRANSACTIONS ON CIRCUITS
AND SYSTEMS-II:EXPRESS BRIEFS,VOL. 52,NO. 11,November 2005.
[20]INA326、INA327,“Precision,Rail-to-Rail I/O INSTRUMENTATION AMPLIFIER”,Burr-Brown Products from TEXAS INSTRUMENTS,Publications Number SBOS222D-Nov. 2001-Revised Nov. 2004. |
-
-
rail.rar
2.74 MB, 下载次数: 1628
, 下载积分:
资产 -2 信元, 下载支出 2 信元
|