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[招聘] [招聘]★★【Signal Integrity Engineer(SI)工程师】知名服务器设计公司诚聘

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发表于 2011-8-20 01:46:11 | 显示全部楼层 |阅读模式

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An experienced signal integrity engineer isbeing sought for design and analysis of high speed interfaces and powerdistribution network. The successful candidate will be part of signal integrityand Power Integrity team and will participate in the definition of chip,package, printed circuit board (PCB), and system interconnects. Within aconcurrent engineering environment, the individual will be part of a largerteam with system architects, logic designers, ASIC engineers, and SI engineersin creation of next generation networking products.

This group works on present and next-generation cost-sensitive yet highperformance and high volume products.

Responsibilities will include but not be limited to:

- Working experience in high speed serial I/O applications, PLLs,transceiver/SERDES operations
- Definition of signaling and package technology for high performance ASICs
- Simulating and/or analyzing and/or generating power delivery networkrequirements
- Understanding signal integrity and timing in order to budget and evaluatetrade-offs between design parameters to determine a solution space that is highvolume manufacturable
- Generating the routing requirements and electrical margins for specificinterfaces and verifying their correctness

Requirements:
- Typically requires BSEE/MSEE/Ph.D combined with above 1 to 8 years of related experiences,
- Proficiency with spice (or equivalent) circuit simulation, field-solver andtime/frequency domain analysis,
- familiarity with high speed serdes design, PLL and LVDS, CML and otherhigh-performance I/O technologies,
- ASIC design experience with I/O selection and simulation/validation, solidbackground on transmission line theory are necessary.
- In depth understanding of electromagnetic is plus.
- Experience with available CAD tools such as HSPICE, HFSS, FDTD tools, MoMtools, Sigrity, PAKSI-E, Sentinel-PI, Siwave, Q3D, Agilent ADS, Cadence SItools or related tools is required.
- Experience correlating simulation results with lab measurements usingoscilloscopes, TDRs, VNAs, and spectrum analyzers is a plus.
- Self motivation, teamwork and strong communication skills are essential.




四年以上需求:5

~四年经验需求:10


工作地点:天津


有兴趣者请联络silenx_tw@hotmail.com/13714587990












 楼主| 发表于 2011-12-28 01:03:46 | 显示全部楼层
An experienced signal integrity engineer isbeing sought for design and analysis of high speed interfaces and powerdistribution network. The successful candidate will be part of signal integrityand Power Integrity team and will participate in the definition of chip,package, printed circuit board (PCB), and system interconnects. Within aconcurrent engineering environment, the individual will be part of a largerteam with system architects, logic designers, ASIC engineers, and SI engineersin creation of next generation networking products.

This group works on present and next-generation cost-sensitive yet highperformance and high volume products.

Responsibilities will include but not be limited to:

- Working experience in high speed serial I/O applications, PLLs,transceiver/SERDES operations
- Definition of signaling and package technology for high performance ASICs
- Simulating and/or analyzing and/or generating power delivery networkrequirements
- Understanding signal integrity and timing in order to budget and evaluatetrade-offs between design parameters to determine a solution space that is highvolume manufacturable
- Generating the routing requirements and electrical margins for specificinterfaces and verifying their correctness

Requirements:
- Typically requires BSEE/MSEE/Ph.D combined with above 1 to 8 years of related experiences,
- Proficiency with spice (or equivalent) circuit simulation, field-solver andtime/frequency domain analysis,
- familiarity with high speed serdes design, PLL and LVDS, CML and otherhigh-performance I/O technologies,
- ASIC design experience with I/O selection and simulation/validation, solidbackground on transmission line theory are necessary.
- In depth understanding of electromagnetic is plus.
- Experience with available CAD tools such as HSPICE, HFSS, FDTD tools, MoMtools, Sigrity, PAKSI-E, Sentinel-PI, Siwave, Q3D, Agilent ADS, Cadence SItools or related tools is required.
- Experience correlating simulation results with lab measurements usingoscilloscopes, TDRs, VNAs, and spectrum analyzers is a plus.
- Self motivation, teamwork and strong communication skills are essential.











四年以上需求:5人


一~四年经验需求:10人





工作地点:天津/深圳





有兴趣者请联络silenx_tw@hotmail.com/13714587990
 楼主| 发表于 2011-12-28 01:07:08 | 显示全部楼层
An experienced signal integrity engineer isbeing sought for design and analysis of high speed interfaces and powerdistribution network. The successful candidate will be part of signal integrityand Power Integrity team and will participate in the definition of chip,package, printed circuit board (PCB), and system interconnects. Within aconcurrent engineering environment, the individual will be part of a largerteam with system architects, logic designers, ASIC engineers, and SI engineersin creation of next generation networking products.

This group works on present and next-generation cost-sensitive yet highperformance and high volume products.

Responsibilities will include but not be limited to:

- Working experience in high speed serial I/O applications, PLLs,transceiver/SERDES operations
- Definition of signaling and package technology for high performance ASICs
- Simulating and/or analyzing and/or generating power delivery networkrequirements
- Understanding signal integrity and timing in order to budget and evaluatetrade-offs between design parameters to determine a solution space that is highvolume manufacturable
- Generating the routing requirements and electrical margins for specificinterfaces and verifying their correctness

Requirements:
- Typically requires BSEE/MSEE/Ph.D combined with above 1 to 8 years of related experiences,
- Proficiency with spice (or equivalent) circuit simulation, field-solver andtime/frequency domain analysis,
- familiarity with high speed serdes design, PLL and LVDS, CML and otherhigh-performance I/O technologies,
- ASIC design experience with I/O selection and simulation/validation, solidbackground on transmission line theory are necessary.
- In depth understanding of electromagnetic is plus.
- Experience with available CAD tools such as HSPICE, HFSS, FDTD tools, MoMtools, Sigrity, PAKSI-E, Sentinel-PI, Siwave, Q3D, Agilent ADS, Cadence SItools or related tools is required.
- Experience correlating simulation results with lab measurements usingoscilloscopes, TDRs, VNAs, and spectrum analyzers is a plus.
- Self motivation, teamwork and strong communication skills are essential.











四年以上需求:5人


一~四年经验需求:10人





工作地点:天津





有兴趣者请联络silenx_tw@hotmail.com/13714587990
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