（招聘）美资 Agere（朗讯）上海高薪诚聘IC designer （41 职位11/01）

indianhill · 发表于 2006-11-2 14:12:35

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（招聘）美独资 Agere system 上海诚聘IC designer （41 职位11月1日），请版主置顶

Agere system 是前朗讯半导体部门，在上海徐家汇设有分公司和研发中心。

Agere Systems is a global leader in semiconductors for storage, wireless data, and public and enterprise networks. The company's chips and software power a broad range of computing and communications applications, from cell phones, PCs, PDAs, hard disk drives and gaming devices to the world's most sophisticated wireless and wireline networks. Agere's customers include top manufacturers of consumer electronics, communications and computing equipment. Agere's products connect people to information and entertainment at home, at work and on the road -- enabling the connected lifestyle. Agere Systems' Storage Division is the world leader in preamplifier and read channel integrated circuits.  We have been a valued provider of electronics solutions to hard disk drive OEMs for over 10 years.  From PRML read channels and controller ASICs to Preamplifiers and Motor Controllers, we deliver advanced, high performance HDD electronics.

诚聘通讯和存储方面的IC designer，要求一年以上工作经验，部分职位要求3-5+年经验。美国独资企业，薪水颇具竞争力。应届请勿扰。

具体的职位信息请参看：
http://www.agere.com/careers/careersearch.html

选择 “China", search.

有意者请联系：agerechina@gmail.com

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部分热招职位：


ASIC Design Engineer – TEN0000001H

Design IC devices in conformance with both Agere Systems and customer requirements and sound design principles; Place and route(layout) of integrated circuits to meet design requirements; Prepare project evaluations in conformance with Company policies/procedures; Provide CAD assistance to customer engineers and new staff as required and/or requested,keep up-to-date with all technical memos; Attend peer reviews and provide feedback to ensure success of peer designs.

Qualifications
B.Sc(Hons.)/B.E.(Hons.) in Electronics,Electrical Engineering, or Physics with emphasis on Electronics/Microelectronic and IC Design. A post-graduate qualification would be advantageous; 3 years prior related experience or approximately 2 years of good performance as an entry level engineer in Agere Systems Design Center; Skills in circuit design, use of Agere System CAD tools; Good analytical and debugging skills; Extremely disciplined in conducting checks and audits; Understands follow well proven methodologies; Strong in first principles; Good communication skills; Ability to interact intelligently and politely with customers.

Digital IC Design Engineer – STO000000GO


Position Description:

A read channel digital IC design engineer’s duties include working within a highly motivated product development team to create and modify high speed digital integrated circuits. You will support the cross functional team in taking our concepts thru to high volume production and assist us in becoming the market leaders in this Mass Storage (hard disk drive) industry.

Job Responsibilities:

l       Working with a Architecture/Algorithm Development Team to finalize system architecture for optimal implementation of digital signal processing algorithms, including architectural definition and tradeoffs, die size estimation.
l       Digital logic design, verilog coding, logic synthesis, both RTL and gate level simulations, formal verification and static timing analysis.
l       Perform transistor level high speed digital integrated circuit design various cells and blocks within custom chips for the hard disk drive industry. Examples of cells and blocks include multiplexers, adders, multipliers, dividers, specific functional macro blocks,


Qualifications
Job Qualifications:

l       Communicate effectively within a global business environment (must be proficient in both spoken and written English)
l       Experience in logic design, synthesis, static timing analysis, and verification
l       Experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, and formal verification
l       Experience in developing simulation and verification test benches
l       Knowledge of Verilog/VHDL design languages
l       Excellent technical troubleshooting and demonstrated problem solving skills
l       Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation
l

Education/Certifications:
Required Degree: BS
Preferred Degree: MS or PhD
Preferred Major: Microelectronics, Electrical Engineering or related discipline



ASIC Verification Engineer (Mid-Level, 4-6 Years Exp.) – TEN0000000P

Job Responsibilities
Duties will include working within a Product Development Team to develop reusable block-level and ASIC testbenches using HVL. Develop new ASIC verification environments to support ASIC development. Maintain existing ASIC verification environments. Review RTL architectural and implementation specifications. Create stimulus drivers, monitors, dataflow models, and test plans to verify function and performance of advanced multiprotocol networking ASICs. Define and develop application tests required to verify ASICs meet functional and performance goals. Define and implement functional coverage plans. Define and implement code coverage plans. Develop testing and regression methodologies for new verification flow. Coordinate test plan implementation and regressions with remote team. Incorporate reusability into all aspects of the verification environment. Develop/maintain/enhance environment tools/scripts/makefiles.

Qualifications
Functional/Industry Knowledge
Required:

- Minimum of 4-6 years ASIC Verification experience in a product development environment
- Proven ASIC Design Verification skills
- Fluent in Verilog for design verification
- Experience with SpecMan
- Experience with one or more scripting languages: awk, Perl, python
- Experience with C/C++
- Superior debugging skills for large ASIC designs

- Knowledge of data and telecommunication networking(TDM/IP/ATM/Ethernet)
- Strong written and verbal communication skills in both Chineses and English
- Adaptable to evolving customer requirements

Desired:
- Past experience in a lead position giving guidance to other engineers

- Profound knoledge of DS3/E3

Education/Certifications
Required Degree: BS
Preferred Degree: MS
Preferred Major: Electrical Engineering or related discipline

Physical Design Engineer (Mid-Level, 4-6 Years Exp.) – STO000000FL

Description

Physical Design (Layout) Engineer : Member of Technical Staff

Position Description:
Join our new design team in Shanghai by working on leading edge Mass Storage silicon solutions . Strong individual needed to support product line growth. The candidate will work on leading edge solutions in ASIC, full custom and SoC environment. The ideal candidate will have demonstrated experience/exposure to custom high-speed analog physical design from initial design phase through to manufacturing. Excellent communication skills are needed, as existing teams span multiple locations.

Qualifications

Expertise in full custom analog layout, signal integrity, power and electro-migration analysis, design rule and connectivity verification is required. Familiarity with digital physical design, basic circuit designs, manufacturing and IC packaging desirable.
q    Must be technically adept
q    strong team player
q    ability to manage multiple priorities and schedules
q    must have strong communication skills.
q    Minimum education is a two year technical degree, BSEE preferred.

q A minimum of 5 years experience in Physical Analog Design is required.