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朗讯半导体(杰尔系统)上海高薪诚聘有经验的 Analog IC Design Engineer

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发表于 2006-11-1 12:10:53 | 显示全部楼层 |阅读模式

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朗讯半导体(杰尔系统)诚聘有经验的 Analog IC Design Engineer

朗讯芯片部门(杰尔系统)诚聘有经验的 Analog IC Design Engineer。工作地点在上海徐家汇甲级写字楼,美国独资研发中心,待遇和福利优厚。要求有一年以上工作经验,英语佳,应届毕业生暂不招收。

有意者请发简历至  agerechina@gmail.com



更多的杰尔系统Digital/Analog IC design 工作机会, 请参看:http://www.agere.com/careers/careersearch.html   并将简历发至 agerechina@gmail.com



*************************************************************************************************
Non-U.S. - Analog IC Design Engineer (Mid-Level, 4-6 Years Exp.) – STO000000G7  4人
   
Job Responsibilities


Duties will include working within a Product Development Team to create (design, layout, and evaluate) new circuit architectures, and to modify existing circuit architectures, verify functionality of designs, prepare and present Design Reviews to internal groups and external customers, write technical reports, attend technical conferences in the areas of data storage and advanced IC design. Specific responsibilities include:




-          Communicate effectively within a global business environment (must be proficient in both spoken and written English).

-          Perform transistor level, analog and mixed signal integrated circuit design of various cells and blocks within custom chips for the hard disk drive industry. Examples of some blocks are: voltage regulators, bandgap circuits, data converters (DAC, ADS), low noise amplifiers, line drivers, multipliers, temperature sensing circuits, filters, operational amplifiers, variable gain amplifiers,  control logic, serial port controller.

-          Support the integration of all cells and blocks into a completed integrated circuit

-          Work directly with customers to determine the system requirements, write specifications, and guide them on the use of our preamplifier products.

-          Conduct detailed design reviews of cell and block level circuits.

-          Perform design validation thru simulation with Cadence software.

-          Use highspeed electronic characterization equipment to evaluate and debug the functionality of the silicon

-          Perform transistor level and block level layout (physical design).

-          Provide technical support and guidance to a cross functional team of engineers thru all phases of product development which includes: test, yield, characterization, reliability analysis, qualification, and release to manufacturing.

-          Adhering to schedule, die size, and power commitments.





Qualifications
Functional/Industry Knowledge
Required:
- Minimum of 4-6 years Analog IC Design experience in a product development environment
- Proven Analog IC Design skills
- Proven experimental skills and lab/bench expertise
- Strong written and verbal communication skills



Desired:
- Past experience in a lead position giving guidance to other engineers

Education/Certifications
Required Degree: BS
Preferred Degree: MS
Preferred Major: Electrical Engineering or related discipline

We value the diversity of our people. Agere is an Equal Opportunity Employer


********************************************************************************************8

Analog IC Designer for Hard Disk Drive Read Channel – STO000000GT    7人
  
Position Description:

A read channel analog IC design engineer’s duties include working within a highly motivated product development team to create and modify high speed mixed signal integrated circuits. You will support the cross functional team in taking our concepts thru to high volume production and assist us in becoming the market leaders in this Mass Storage (hard disk drive) industry.


Job Responsibilities:

l         Design the next generation Analog circuits for the Read Channel macro.
l         Work with Architecture and Digital Development Teams to achieve optimal implementation.
l         Verify and validate the functionality of the analog circuits.
  


Qualifications
Job Qualifications:

l         Communicate effectively within a global business environment (must be proficient in both spoken and written English)
l         3+ years experience in chip level CMOS analog design
l         Experience with high speed opamps, continuous time filters, wide band A/D & D/A converters, and PLLs preferred
l         Must have experience with Cadence tools.
l         Experience in developing simulation and verification test benches
l         Excellent technical troubleshooting and demonstrated problem solving skills
l         Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation
l         

Education/Certifications:
Required Degree: BS
Preferred Degree: MS or PhD
Preferred Major: Microelectronics, Electrical Engineering or related discipline

***************************************************************************************
                  
Pysical Design Engineer – STO000000GX    8人

   
Position Description:

Join our new design team in Shanghai by working on leading edge Mass Storage silicon solutions . Strong individual needed to support product line growth. The candidate will work on leading edge solutions in ASIC, full custom and SoC environment. The ideal candidate will have demonstrated experience/exposure to custom high-speed analog physical design from initial design phase through to manufacturing. Excellent communication skills are needed, as existing teams span multiple locations.



Qualifications
Job Qualifications:

Expertise in full custom analog layout, signal integrity, power and electro-migration analysis, design rule and connectivity verification is required. Familiarity with digital physical design, basic circuit designs, manufacturing and IC packaging desirable.

q     Must be technically adept

q     strong team player

q     ability to manage multiple priorities and schedules

q     must have strong communication skills.

q     Minimum education is a two year technical degree, BSEE preferred.

q     A minimum of 5 years experience in Physical Analog Design is required.

[ 本帖最后由 indianhill 于 2006-11-1 16:09 编辑 ]
 楼主| 发表于 2006-11-3 14:55:50 | 显示全部楼层
为什么没有人投简历应聘Analog IC Designer呢?

最近收到的多是来应聘Digital IC designer 的,而Analog 一直空缺。
发表于 2006-11-3 22:45:24 | 显示全部楼层
3+ years experience in chip level CMOS analog design
~~~~~~~~~~~~~~~~~~~~~~
可惜我是bipolar
 楼主| 发表于 2006-11-7 10:30:27 | 显示全部楼层
看来大家对Agere Systems (杰尔系统)不太了解,Agere在很多领域都是开拓者和市场强者,Agere脱胎于贝尔实验室和朗讯科技,是晶体管、激光器件、蓝牙、WiFI, DSP等很多技术的发明人,执有IC行业~7000项专利。在朗讯的时代,Agere几乎就是通讯半导体的代名词。大家所熟知的Samsung 手机,中兴华为的基站、Seagate硬盘,Maxtor硬盘,Ipod等产品里面,Agere都扮演重要角色。
发表于 2006-11-7 10:59:58 | 显示全部楼层
大名鼎鼎的Agere,怎么会没有人知道呢?
估计是被“吓着”了吧,才没有人投简历。
呵呵......
上海招不招无线射频方面的?



原帖由 indianhill 于 2006-11-7 10:30 发表
看来大家对Agere Systems (杰尔系统)不太了解,Agere在很多领域都是开拓者和市场强者,Agere脱胎于贝尔实验室和朗讯科技,是晶体管、激光器件、蓝牙、WiFI, DSP等很多技术的发明人,执有IC行业~7000项专利。在 ...

发表于 2006-11-7 18:00:30 | 显示全部楼层
为什么信箱是gmail的?
发表于 2006-11-8 13:49:17 | 显示全部楼层
嗯,有理。问的好。


原帖由 maplefire 于 2006-11-7 18:00 发表
为什么信箱是gmail的?

发表于 2006-11-9 19:22:12 | 显示全部楼层

回复 #2 indianhill 的帖子

你已经说的很明白了,应届毕业生不要的,现在有经验的人,基本上都稳定了,而且有经验模拟IC人才本来就少,所以没人投了!
 楼主| 发表于 2006-11-10 10:29:50 | 显示全部楼层
回5楼:

目前在上海暂时不招聘无线射频方面的人才,您可以关注一下我们的招聘网站,看看什么时候有RF方面的职位空缺。
发表于 2006-11-10 13:19:44 | 显示全部楼层

回复 #2 indianhill 的帖子

你是猎头还是agere的hr?
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