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[招聘] 上海IC相关职位-carrie

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发表于 2011-3-18 09:54:10 | 显示全部楼层 |阅读模式

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本帖最后由 carrie_kthr 于 2011-3-18 09:59 编辑

Our client is a leading force in the digital home entertainment market, delivering innovative semiconductor solutions for digital televisions and set-top boxes .It has an extensive patent portfolio, highly-efficient SOC design and implementation expertise, and focus on open platforms. These STRENGTHS enable the world’s top consumer electronics OEMs, set-top box providers and network operators TO DELIVER differentiated, compelling solutions that are driving the next wave in consumer home entertainment.
Now they are looking for:

Sr IC Design Engineer (Demodulator)

As a IC Design engineer, you will work in a highly innovative and motivated design team on next generation demodulator IP/Standalone chip development includes:

- Preparation and review of functional and design specification

- Implementation Spec and micro architecture definition based on the matlab, C or SystemC model

- Coding of functionality with Vhdl or verilog

- Verification and simulation of needed functionality from block level to top level

- Synthesis/STA/Lint Check/Formal Check on given blocks

- Demodulator IP integration in SOC Chip

- Validation demodulator IP/Standalone Chip

Qualifications: (Education, Experience, etc.)

- Bachelors with 4+ asic related experience or masters degree with 2+ related experience

- Programming skills in VHDL, Verilog, C/C++ and any script language (such as unix shell, tcl, perl etc)

- Expertise in logic block designs, simulation, synthesis and static timing analysis

- Working knowledge of telecommunication and demodulator is a good plus

- Good communication, learning skills,

- Fluent in spoken and written English

Position Summary

As senior IC design engineer, you will be responsible for the large-scale SOC partion, integration, clock/reset/low power/top control scheme design, whole chip verification, EC, STA and floorplan.

Sr. ASIC Design Engineer

Responsibilities

  • Develop the whole chip clock/reset/low power scheme and top level integration
  • Prepare whole chip pre-silicon simulation environment and be responsible for whole chip verification
  • Working with backend for chip floorplanning
  • Be responsible for whole chip STA and EC
  • Provide support for production issues
  • Prepare documents

Qualifications

Required:

  • MSEE preferred
  • 3 - 8+ years front end logic design
  • Proficiency in Verilog RTL coding and CAD tools for chip design
  • Proficiency in large-scale SOC partion, integration, clock/reset/low power/top control scheme design is better
  • Proficiency in systemverilog for chip verification is better
  • Familiarity with chip verification envirenment setup
  • Proficiency for perl, TCL and shell script
  • Proficency for STA and EC tools
  • Experience for whole chip floorplanning
  • Self motivated to finish jobs

IC Logic Design Engineer

Job Duties:

Micro-architecture design, RTL coding, simulation and verification of the assigned graphics block; should be also responsible for the synthesis and timing check of the block.

Qualifications

1.Education: Master degree or above, major in Micro-electronic,EE, CS or related.

2.Experience: Have experience on SOC chip design.

3.Knowledge of/Skills and Abilities·Be familiar with IC logic design flow;·Have good skill in RTL coding, simulation, synthesis and static timing analysis;·Have strong hardware knowledge of computer architecture, Know-how in computer graphics is preferred;·GFX Chip design experience will be a good plus.

Sr/staff. ASIC Design Engineer(video codec)

Job Duties:  

Responsible for DTV/STB multi-format video codec hardware module development and support. This video codec hardware core will worked together with embeded mips/arm cpu to implement real-time high-definition encoding, decoding and transcoding functions of input bitstreams or video sequence.

Qualifications:  

B.S/M.S degree in Computer Science or Micro-electronics or equivalents
Be familiar with design flow for ASIC chip design, skillful in RTL coding, synthesis and timing analysis
Be Familiar with video compression/decompression algorithms and multimedia applications.
Good knowledge in embedded system design.
Team player and self-driven.
Fluent in written and spoken English.

Any of the followings will be a good plus and preferred:
Have 4+ years experience in hardware development for video decode/encode or related projects.
Have skills in FPGA development
Skillful in C/C++ programming language.
Have certain knowledge on SoC HW and dsp.


Architecture engineer

Responsibilities

  • Responsible for Architecture Design and C-modeling on 3D graphics blocks for the next generation of STB/IPTV/HiDTV products

Qualifications

  • Education: Master degree or above. major in CS, EE, or related
  • Experience: More than 4 years experience on hardware c-modeling, 3D graphics driver, and/or 3D graphics application
  • Knowledge of/Skills and Abilities


Be familiar with hardware c-modeling

Good skill in C/C++ coding;

Knowledge of computer graphics, OpenGL, and/or other 3D standards;

Knowledge of
computer architecture and logic design is required;

Senior Verification Engineer

Job Responsibilities:

1. Apply specialist skills and knowledge in both hardware and software to perform Pre-Silicon verification tasks for complex Digital Media Processor SOC devices

2. Perform co-verification of processor models and RTL including application software and firmware verification

3. Develop verification strategies; evaluate and integrate cutting edge verification/emulation methodologies into the tool flow

4. Work with other cross functional teams in China and oversea to specify, verify and improve SoC quality and timeliness to production

Job Requirements:

1. 3 years or above experience in ASIC/complex SoC verification

2. Experienced in HDL languages, simulation tools and testbench design.

3. Experienced with C/C++ and script languages programming.

4. Master degree or above in EE or CS.

ASIC CAD Engineer

Responsibilities:

Participate in the design and implementation of the leading edge ASIC chip.

Your focus is on design flow.Ensure the design methodology correct and improve automation and productivity. The main flow steps include:

FE: Synthesis, Simulation, STA, Design Check and memory compiler etc.

BE: Place and Routing, Physical verification, Signal integrity, Power analysis etc.



Another important part of the job is doing support to FE /BE team.

When they have a real design issue and can’t solved by themselves, you may be asked to jump in for debug and find a solution. Usually you will work with EDA vendors on such case.

Responsibilities besides support project work also include interfacing with other implementation experts across different development locations, and driving the continuous improvement of advanced implementation methods to Trident digital TV and Set-Top-Box projects teams.  

Experience and Skills Required:

Essential

a)Major in Electronic Engineering or Computer Science.

b)Master (or Bachelor 2+ years related experience)

c)Strong programming skill with one or more following items( Perl,Tcl,C/C++ etc).

d)Experience with industry standard development EDA tools and flow.

    i.BE engineer: DC, RTL Compiler, PT, Conformal LEC, NC. VCS

    ii.BE engineer: SOC encounter, Apache Redhawk etc.

e)Good written and fluent oral English.

f)Good communication skills and team work.


Desirable

Real ASIC project experience as a FE or BE designer is a plus.

Video Process Senior HW Engineer

RESPONSIBILITY:


       1.TV Video Post-Processing IC&System board bring-up/Validation/SDK development

2. Video enhancement algorithm verification/tuning/development

3. Leading Customer support


QULIFICATION:


       1. EE Master or bachelor with 3+ years work experience

2. experience in video processing

3. experience with PCB design/system debug

4. good communication skill

5. good English writing/speaking

6. Software skill is preferred


Senior system HW Engineer

Responsibilities

Requirement Scoping, Development, Testing and Feature maintenance of Tv and Set box related SoCs, Back end, etc.

Skills Required

familiar with the Linux OS and the MIPS, ARM structure.

Experience in Ethernet, DDR, PCI, I2C, Flash, SPI, SATA, SDIO, USB, Modem, IR drivers

Familiar with the hardware validation of the high speed circuit and the production process.

Experience in bootloader (optional)

If you are interested in this opportunity with my client , please feel free to contact me,Carrie Hu, in the strictest of confidence, by email at carrie-hu@kthr.com, or phone : + (86)021-61023600-25, or mobile + 86)139 1607 0643.
You can also contact me via MSN as follows:

MSN: mimmimhu@msn.com

 楼主| 发表于 2011-3-19 19:48:17 | 显示全部楼层
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