MTK成都招聘Senior ASIC Design & Verification Engineer

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Job Title: Senior ASIC design engineer
Location: Chengdu
Job description:
1. Central digital IP development and maintainess
2. Support IP integration for BU products.

Requirement:
1. MS/BS Degree in Microelectronics/Electrical Engineering/Computer Science.
2. Minimum 1 year of ASIC design/verification experience.   
3. Complete ASIC front end design flow from micro architecture define to SPEF out.  
4. Familiar with SOC architecture and AMBA specification.
5. Familiar with USB2.0/USB3.0/Ethernet/SDIO protocol is a plus.


Job Title: Senior ASIC design verification engineer
Location: Chengdu
Job description:
1. Conduct central IP verification from verification planning to coverage signoff using advanced verification methodologies.  
2. BU project support for IP integration verification.

Requirement:
1. MS/BS Degree in Microelectronics/Electrical Engineering/Computer Science.
2. Minimum 1 year of ASIC design/verification experience.   
3. Familiar with Contraint Random Verification(CRV) methodologies - VMM/UVM.
4. Familiar with SOC architecture and AMBA specification.
5. Experience of applying CRV on complex module/subsystem verifications is a plus.
6. Familiar with assertion based verification is a plus.
6. Familiar with USB2.0/USB3.0/Ethernet/SD protocol is a plus.

Please send your resume to tao.liu@mediatek.com if you are interested.

#1bookworm

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#1bookworm

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