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[资料] 【新书】Accelerating Test, Validation and Debug of High Speed Serial Interfaces

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发表于 2011-1-5 10:57:14 | 显示全部楼层 |阅读模式

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本帖最后由 vertyang 于 2011-2-11 22:15 编辑

Springer.Accelerating Test, Validation and Debug of High Speed Serial Interfaces.rar (8.36 MB, 下载次数: 652 )



Accelerating Test, Validation And Debug Of High Speed Serial Interfaces: Yongquan Fan, Zeljko Zilic
by
Fan , Zeljko Zilic, Zilic and Yongquan Fan

FORMAT: Hardback
ISBN: 9789048193974

High-Speed Serial Interface (HSSI) devices have become widespread in communications, from the embedded to high-performance computing systems, and from on-chip to a wide haul. Testing of HSSIs has been a challenging topic because of signal integrity issues, long test time and the need of expensive instruments. Accelerating Test, Validation and DebugofHighSpeedSerial Interfaces provides innovative test and debug approaches and detailed instructions on how to arrive to practical test of modern high-speed interfaces.

Accelerating Test, Validation and DebugofHighSpeedSerial Interfaces first proposes a new algorithm that enables us to perform receiver test more than 1000 times faster. Then an under-sampling based transmitter test scheme is presented. The scheme can accurately extract the transmitter jitter and finish the whole transmitter test within 100ms, while the test usually takes seconds. The book also presents and external loopback-based testing scheme, where and FPGA-based BER tester and a novel jitter injection technique are proposed. These schemes can be applied to validate, test and debug HSSIs with data rate up to 12.5Gbps at a lower test cost than pure ATE solutions. In addition, the book introduces an efficieng scheme to implement high performance Gaussian noise generators, suitable for evaluating BER performance under noise conditions.



Table of contents

1 Introduction. 1.1 Motivation. 1.2 Contributions. 1.3 Overview of the Book.
2 Background. 2.1 High-Speed Serial Communications. 2.2 Timing Jitter. 2.3 Amplitude Noise.
3 Accelerating Receiver Jitter Tolerance Testing on ATE. 3.1 Introduction. 3.2 Jitter Test Signal Generation. 3.3 Receiver Bit Error Monitoring. 3.4 Jitter Tolerance Extrapolation. 3.5 Other Applications of the New Method.
4 Transmitter Jitter Extractions on ATE. 4.1 Introduction. 4.2. Test Setup for Data Acquisition. 4.3. Jitter Extraction. 4.4 Experimental Results. 4.5 Summary.
5 Testing HSSIs with or without ATE Instruments. 5.1 DFT in HSSIs. 5.2 FPGA-based Bit Error Detection. 5.3 Loopback Testing with Jitter Injection. 5.4 A Versatile HSSI Testing Scheme.
6 BER Testing Under Noise. 6.1 AWGN Generation Overview. 6.2 Our Implementation. 6.3 Baseband Transmission Testing. 6.4 Advantages of Our AWGN Generator.


                               
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发表于 2011-1-5 13:27:50 | 显示全部楼层
good reference for high speed serial interface test
发表于 2011-1-5 18:01:50 | 显示全部楼层
thanks a lot
发表于 2011-1-5 20:55:21 | 显示全部楼层
thanks!
发表于 2011-1-5 21:10:29 | 显示全部楼层
谢谢分享
发表于 2011-1-5 21:47:24 | 显示全部楼层
good, thanks.
发表于 2011-1-6 08:39:48 | 显示全部楼层
have a look,thank you.
发表于 2011-1-6 10:51:50 | 显示全部楼层
下来看看,谢谢。
发表于 2011-1-6 23:21:48 | 显示全部楼层
看来这本书很不错啊
发表于 2011-1-8 11:14:04 | 显示全部楼层
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