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请各位帮忙下载几篇IEEE文章,多谢啦!
[1] A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessorsby Zhiyi Yu; Baas, B.M.
This paper appears in: Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Issue Date : May 2010
Volume : 18 , Issue:5
On page(s): 750 - 762
[2] AsAP: A Fine-Grained Many-Core Platform for DSP Applications
by Baas, B. ; Zhiyi Yu ; This paper appears in: Micro, IEEE
Issue Date : March-April 2007
Volume : 27 , Issue:2
On page(s): 34 - 45
[3] High Performance, Energy Efficiency, and Scalability with GALS Chip Multiprocessors
by Zhiyi Yu; Baas, B.M.;
This paper appears in: Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Issue Date : Jan. 2009
Volume : 17 , Issue:1
On page(s): 66 - 79
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