CMOS Continuous-Time Multipliers_A Tutorial(Professor Sanchez(IEEE Fellow))

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CMOS Continuous-Time Multipliers_A Tutorial(Professor Sanchez(IEEE Fellow))

GodofSun

是fellow的我就看！

asueee

good, thanks

asueee

the papar is the calssic

asueee

classic!!1

asueee

good paper

semico_ljj

推荐！！！

semico_ljj

Abstract—Real-time analog multiplication of two signals is one
of the most important operations in analog signal processing. The
multiplier is used not only as a computational building block but
also as a programming element in systems such as filters, neural
networks, and as mixers and modulators in a communication
system. Although high performance bipolar junction transistor
multipliers have been available for some time, the CMOS multiplier
implementation is still a challenging subject especially
for low-voltage and low-power circuit design. Despite the large
number of papers proposing new MOS multiplier structures,
they can be roughly grouped into a few categories. This tutorial
provides a complete survey of CMOS multipliers, presents a
unified generation of multiplier architectures, and proposes the
most recommended MOS multiplier structure. This tutorial could
serve as a starting reference point (and metric) for comparison
of new CMOS multiplier circuit configurations. An illustrative
CMOS chip prototype verifying theoretical results is presented.

Index Terms—CMOS multipliers, low noise design, low voltage
circuits, multipliers.

semico_ljj

Gunhee Han and Edgar S´anchez-Sinencio, Fellow, IEEE

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 12, DECEMBER 1998

semico_ljj

CONCLUSION
Although a large number of transconductance multipliers
are reported in the literature, they fall into eight categories
described in this tutorial and are summarized in Table I.
Several multiplier architectures do not have any clear advantage
over others. As the current trend of circuit design is
low voltage and low power, the circuit shown in Fig. 7(c)
seems to be one of the most attractive low-voltage and highperformance
MOS multiplier structures. A BiCMOS version
that uses BJT instead of the source follower will improve
its performance. Several design considerations of the circuit
Fig. 7(c) were provided.
A reader should be aware that this comparison might not
hold for all cases. The choice of circuit topology is completely
dependent on design specifications.