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发表于 2009-7-20 21:25:24
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Based on the square-law equations:
ID=0.5*un*Cox*W/L*(VG-Vth)^2*(1+lamba*VD);
gm=derivation of ID to VG=un*Cox*W/L*(VG-Vth)*(1+lamba*VD);
gd=derivation of ID to VD=0.5*un*Cox*W/L*(VG-Vth)^2*lamba;
1. Build up a circuit with the specified NMOS: DC source with the DC parameter - VG at the gate terminal and DC source with the DC parameter - VD at the drain terminal; The source terminal and bulk terminal of the NMOS are all tied to the ground.
2. DC analysis: sweep the VG for the drain current (0V - whatever the device can tolerate) with different VD (e.g. 0.5, 1, 1.5, ..) using the parameter analysis.
The VD should be big enough to let the device work in saturation region. Draw the ID-VG plots for different VD.
3. Do the derivation of the plot ID-VG using the calculator tool: you get the gm-VG plot;
4. Using the gm-VG plot and ID-VG plot to get the Vth versus VG: Vth = VG - 2*ID/gm, VG is the x-axis of either gm-VG plot or ID-VG plot; You get the Vth first.
5. Similar to step 2, 3, and 4, draw the ID-VD and gd-VD plot: 1/lamba=ID/gd-VDS, you get the lamba;
6. Using the lamba, Vth, W/L and any plot of the ID-VD, ID-VG, gm_VG, or gd_VD to get the un*Cox; |
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