Design of CMOS ring oscillator (Sweden)-2005

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Contents
1 Introduction ............................................................................................7
2 Background theory ................................................................................8
2.1 Clock generation ........................................................................8
2.2 Oscillation...................................................................................8
2.3 Types of CMOS Oscillators........................................................9
2.4 Phase noise, timing jitter of ring oscillators ..............................10
2.5 MOSFET - Devices ..................................................................14
3 Ring oscillators ....................................................................................19
3.1 General properties of ring oscillators .......................................19
3.2 Topologies................................................................................20
4 Differential VCO....................................................................................24
4.1 VCO - structure ........................................................................24
4.2 Load element ...........................................................................24
4.3 Voltage-swing consideration ....................................................28
4.4 Phase noise in Differential delay cells......................................29
4.5 Bias replica circuit ....................................................................31
5 Design ...................................................................................................33
5.1 Target performance..................................................................33
5.2 VCO- Core ...............................................................................33
5.3 Bias replica circuit ....................................................................41
5.4 Buffer stage..............................................................................42
5.5 Design summary ......................................................................44
6 Schematic simulations ........................................................................46
6.1 Performed simulations .............................................................46
6.2 Simulation results and test benches ........................................47
6.3 Simulation summary.................................................................52
7 Layout ...................................................................................................54
7.1 Floor plan .................................................................................54
7.2 Layouts.....................................................................................54
7.3 Layout simulation .....................................................................54
8 Comparison with a LC oscillator ........................................................56
8.1 LC oscillator .............................................................................56
8.2 LC vs. ring oscillator.................................................................56
9 Process Scaling ...................................................................................58
9.1 General consideration of process scaling ................................58
9.2 Redesign of delay cell in 0.25-μm process ..............................59
9.3 Simulations...............................................................................60
10 Results ..................................................................................................63
11 Discussion and conclusions...............................................................64
12 Outlook..................................................................................................65
References.....................................................................................................66

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