Table of Contents
1. Setup your Cadence Account and MITLL FD SOI Design
Environment
2. Starting the Cadence software
3. Opening and Using the Library Manager
4. Design Hierarchy
5. Quitting the Session
6. Creating a new library
7. Creating a new Cell: Inverter
8. Schematic Simulation: Transient Analysis with manual
stimuli input
9. Printing your Schematic
10. Creating Symbols: Inverter Symbol
11. Schematic Simulation: Creating a Test File for Simulating an
Inverter
12. Spice simulation: DC Analysis of The Inverter
13. Schematic Simulation: Transient Analysis of The Inverter
14. Layout: Creating Layout for an Inverter
15. Design Rule Check (DRC)
16. Layout Extraction
17. Layout Versus Schematic (LVS)
18. Layout Simulation: Transient Analysis