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发表于 2008-11-6 15:55:23
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: FUNDAMENTAL THEORY AND APPLICATIONS, VOL. 49, NO. 11, NOVEMBER 2002
Abstract—In this paper, an optimized strategy for designing
charge pumps with minimum power consumption is presented.
The approach allows designers to define the number of stages
that, for a given input, and an output voltage, maximize power
efficiency. Capacitor value is then set to provide the current
capability required. This approach was analytically developed and
validated through simulations and experimental measurements on
0.35- m EEPROM CMOS technology. This approach was then
compared with one which minimized the silicon area and it was
shown that only a small increase in area is needed to minimize
power consumption.
Index Terms—Charge pump, integrated circuit (IC), power consumption,
voltage multiplier. |
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