请问PCI连续高速数据传送,选PCI9054好还是AMCC5933好?

cdhqh

请问PCI连续高速数据传送,选PCI9054好还是AMCC5933好?

jingli888ca

I think your question is a pretty typical one when people debate the system architecture. As a matter of fact, the device itself does not show its strenth without a clear understanding of your application and bus transaction.
Take PCI bus for example, there are a number of ways to transfer 16DWORDs. single Write, burst write, single read, burst read. Writes are naturally more advantageous than reads because read require a retry cycle before actually getting the data. This will double the overhead.
Even using bursts, it is still limited by latency timer setting and cache line size setting, and these settings are configured by the OS and not something that application can control. These settings will break a long burst into a number of small bursts, which further increase overhead.
The above factors are the ones of the protocol level. There are factors on even basic level, device response time. The device response time defines fase device, medium device and slow device, and the medium device adds an extra cycle on both writes and reads, and the slow devie two.
Arbitration is the factor on a level that is higher than protocol. The number of devices on the bus is, therefore, another factor. How many bridges does a transaction has to pass is another one.
On the driver side (a level up), how does the driver takes advantage of the OS API to access the hardware. Whether or not the driver has an internal buffer to increase parrellism is critical in the development of the driver, and so is it in the development of the application software.
All these has to be understood thoroughly and well planned before picking a chip. This is the job of a system architect. Believe me, it is NOT easy.

joky

PCI9054比AMCC5933价格便宜，我在做PCI9054的DMA传输时测过连续可传60M字节/秒。

CDHQH

60M字节/秒？这么快?