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发表于 2005-1-19 08:40:26
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请教斑竹!各位网友!
PCI Local Bus Specification Production Version Revision 2.1 June 1, 1995
4.4.2.1. Decoupling(page 169)
Under typical conditions, the Vcc plane to ground plane capacitance will provide
adequate decoupling for the Vcc connector pins. The maximum trace length from a
connector pad to the Vcc/GND plane via shall be 0.25 inches (assumes a 20 mil trace
width).
However, on the Universal board, it is likely that the I/O buffer power rail will not have
adequate capacitance to the ground plane to provide the necessary decoupling. Pins
labeled "+V I/O" should be decoupled to ground with an average of 0.047 mF per pin.
Additionally, all +3.3V pins (even if they are not actually delivering power), and any
unused +5V and V I/O pins on the PCI edge connector provide an AC return path, and
must have plated edge fingers and be coupled to the ground plane on the add-in board as
described below to ensure they continue to function as efficient AC reference points:
1. The decoupling must average at least 0.01 mF (high-speed) per Vcc pin.
2. The trace length from pin pad to capacitor pad shall be no greater than 0.25 inches
using a trace width of at least 0.02 inches.
3. There is no limit to the number of pins that can share the same capacitor provided
that requirements 1 and 2 are met. |
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