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EETOP诚邀模拟IC相关培训讲师 创芯人才网--重磅上线啦!
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发表于 2005-1-18 10:15:47 | 显示全部楼层 |阅读模式

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PCI扩展卡到底需不需要在金手指与9052之间加退耦电容?PCI协议上说是必须的!请各位网友给点指导!
发表于 2005-1-18 16:45:56 | 显示全部楼层

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你参考的是哪个协议,多少页啊?挺有意思的,可以说一下么?
 楼主| 发表于 2005-1-19 08:40:26 | 显示全部楼层

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PCI Local Bus Specification Production Version Revision 2.1 June 1, 1995
4.4.2.1. Decoupling(page 169)
Under typical conditions, the Vcc plane to ground plane capacitance will provide
adequate decoupling for the Vcc connector pins. The maximum trace length from a
connector pad to the Vcc/GND plane via shall be 0.25 inches (assumes a 20 mil trace
width).
However, on the Universal board, it is likely that the I/O buffer power rail will not have
adequate capacitance to the ground plane to provide the necessary decoupling. Pins
labeled "+V I/O" should be decoupled to ground with an average of 0.047 mF per pin.
Additionally, all +3.3V pins (even if they are not actually delivering power), and any
unused +5V and V I/O pins on the PCI edge connector provide an AC return path, and
must have plated edge fingers and be coupled to the ground plane on the add-in board as
described below to ensure they continue to function as efficient AC reference points:
1. The decoupling must average at least 0.01 mF (high-speed) per Vcc pin.
2. The trace length from pin pad to capacitor pad shall be no greater than 0.25 inches
using a trace width of at least 0.02 inches.
3. There is no limit to the number of pins that can share the same capacitor provided
that requirements 1 and 2 are met.
发表于 2005-1-19 11:56:20 | 显示全部楼层

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哦,对不起,理解错了,
其实是说金手指提供的电源需要加去耦电容,
在信号线上不用加,
其实一般的布线都会在芯片靠近vcc的引脚周围加去耦电容的。
 楼主| 发表于 2005-1-19 13:08:06 | 显示全部楼层

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那么应该怎样布局?放在金手指与9052之间时总会影响布线效果,有更好的办法吗?
发表于 2005-1-19 15:35:23 | 显示全部楼层

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因为你板卡电源都是从金手指引出来的,所以你就没必要考虑金手指本身了,
集中精力于一点:芯片vcc需要去耦电容
所以你可以在9052每个vcc脚都接个小电容,物理位置准则是越接近芯片引脚越好。
 楼主| 发表于 2005-1-19 17:26:37 | 显示全部楼层

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谢谢斑竹!
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