！！要发就发绝的，你不用再费心去找其它的verilog-a资料了！！

xenolidar

论坛里的verilog-a比较散，我汇总了一下，加上其他路径的资料，差不多你能上网找到的verilog-a资料全在这了。

什么是verilog-a？

The Verilog-A Hardware Description Language (HDL) language is used as a behavioral language for analog systems. Verilog-A HDL is derived from the
IEEE 1364 Verilog HDL specification.

The intent of Verilog-A HDL is to let designers of analog systems and integrated circuits
create and use modules that encapsulate high-level behavioral descriptions as well as
structural descriptions of systems and components. The behavior of each module can be
described mathematically in terms of its terminals and external parameters applied to the
module. The structure of each component can be described in terms of interconnected
sub-components. These descriptions can be used in many disciplines such as electrical,
mechanical, fluid dynamics, and thermodynamic

[ 本帖最后由 xenolidar 于 2008-11-25 10:55 编辑 ]

igolaps

thanks

昵称未占用

楼主太强啦
这么多年的帖子了，不论楼主能不能看到，还是感谢楼主

对方正在长头发

感谢分享

wshx

soulhenry

赞楼主

zheng_qa

谢谢，太全面了！

camelcat

感谢啊

ccfight

感谢分享

JhonsonHu

谢谢楼主