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找書:
書名: Minimum Number of Timing Signoff Corners
作者 [color=var(--__N4QdChsbGN6j,#007185)]Dr. Alexander Tetelbaum (Author)
Abstract
This unique book describes a brand new approach of how to do timing signoff of complex microchips and Systems-on-Chip (SoC) with the minimum number of corners. The number of timing signoff corners exponentially grows and makes microchip design very complex, time consuming, or even impossible to close timing. Additionally, there is a toll on microchip performance due to conservatism, which increases with the corner number.
Factors impacting the corner number and methods on how to find the minimum number of traditional Power, Voltage, Temperature (PVT) and Resistance, Capacitance (RC) corners are considered. A break-through method with the absolute minimum of the corner number is justified where instead of PVT/RC corners 4 min/max timing delay corners (so-called slack corners) are introduced.
Also a new approach on how to design SoC for the maximum profit by setting a proper target for the timing yield Y during timing signoff is discussed. Finally, possible enhancements in signoff paradigms, methods, and statistical STA tools are outlined. The importance of these pseudo- and fully-statistical Monte Carlo-based post-STA methods is to study OCV variations in detail and justify all OCV derates for STA tools no matter the PVT/RC corners signoff is or the 4-slack corners is used.
The book is mainly targeting microchip designers and software engineers in Electronic Design Automation (EDA) companies as well as companies that design and/or manufacture microchips.
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